Texas Instruments M0G3106QDGS28RQ1
- Part No.:
- M0G3106QDGS28RQ1
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 28-TFSOP (0.118", 3.00mm Width)
- Datasheet:
-
M0G3106QDGS28RQ1.pdf
- Description:
- AUTOMOTIVE 80MHZ ARM CORTEX M0+
- Quantity:
- Payment:

- Shipping:

Inventory:2,872
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
M0G3106QDGS28RQ1 from Texas Instruments is an automotive-grade Arm® Cortex®-M0+ microcontroller with CAN-FD interface, 64KB flash, 32KB SRAM, dual 12-bit 4Msps ADCs, and ASIL B functional safety certification for body electronics and motor control applications.
For engineers reviewing the M0G3106QDGS28RQ1 datasheet, M0G3106QDGS28RQ1 pinout, M0G3106QDGS28RQ1 application, or M0G3106QDGS28RQ1 equivalent, this page delivers verified technical context, package-specific pin mapping, real-world automotive use cases, and validated alternative options aligned to AEC-Q100 Grade 1 and ISO 26262 ASIL B requirements.
Technical Context
The M0G3106QDGS28RQ1 integrates a memory protection unit (MPU), 7-channel DMA, and dual high-speed ADCs with simultaneous sampling and hardware averaging enabling 14-bit effective resolution at 250ksps. Its clock system combines SYSOSC (±1.2%), PLL (up to 80MHz), and LFXT/LFOSC for robust timing across automotive temperature ranges.
It supports ultra-low-power operation with STANDBY mode consuming 1.5µA while retaining RTC, SRAM, and CPU state, and includes AES-128/256 encryption, TRNG, CRC-16/32, and two window-watchdog timers (WWDT) for secure, fault-tolerant embedded control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M0+, 80MHz max frequency with MPU for memory isolation in safety-critical tasks |
| Flash / SRAM | 64KB flash with ECC; 32KB SRAM with hardware parity - ensures data integrity in harsh environments |
| ADC Performance | Two 12-bit 4Msps ADCs with 17 external channels; 14-bit effective resolution at 250ksps via hardware averaging |
| Operating Range | –40°C to +125°C, 1.62V–3.6V supply - qualified per AEC-Q100 Grade 1 for under-hood automotive use |
| Communication | CAN-FD (CAN 2.0A/B compatible), 4× UART, 2× I²C (FM+, 1Mbit/s), 2× SPI (up to 32Mbit/s) |
| Power Modes | RUN: 101µA/MHz; STANDBY: 1.5µA with RTC/SRAM retention; SHUTDOWN: 80nA with IO wake-up capability |
| Safety Certification | ISO 26262 ASIL B certified by TÜV; systematic capability and hardware integrity up to ASIL B |
Pinout & Package
28-pin VSSOP (DGS28) package, 7.1mm × 4.9mm body, 0.5mm pitch, with wettable flanks option available. Pin count and layout optimized for compact automotive modules requiring CAN-FD and analog sensing in space-constrained designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PA0 / FCC_IN | Functional Clock Control Input | Accepts external clock source for system synchronization or BSL entry; supports factory programming |
| PA19 / SWDIO | Serial Wire Debug I/O | 2-pin SWD interface for non-intrusive debugging and firmware update without dedicated debug header |
| PA20 / SWCLK | Serial Wire Debug Clock | Provides clock for SWD communication; enables low-pin-count debug in production and field service |
| PA21 / VREF− | Analog Reference Negative | Shared negative reference for ADCs and GPAMP; configurable with internal 1.4V/2.5V VREF+ |
| PA23 / VREF+ | Analog Reference Positive | Configurable internal voltage reference (1.4V or 2.5V) for precise ADC and GPAMP biasing |
| PA26 / A0_1 | ADC0 Channel 1 Input | Analog input for primary ADC bank; supports simultaneous sampling with other A0_x pins |
| PA27 / A0_0 | ADC0 Channel 0 Input | Primary analog input channel; also serves as RTC_OUT for timekeeping signal routing |
| NRST | Active-Low Reset | Asynchronous reset input; triggers full device initialization and state clearing on falling edge |
| VDD / VSS | Power Supply / Ground | Core power domain (VCORE) and I/O supply (VDD) are separate; requires decoupling per datasheet layout guidelines |
| VCORE | Core Voltage Supply | Dedicated 1.2V core regulator input; must be externally filtered to meet noise immunity specs for MCU stability |
Key Features
| Feature | Design Value |
|---|---|
| ASIL B Functional Safety | ISO 26262-certified hardware and documentation support for systematic development of safety mechanisms |
| Dual Simultaneous ADCs | Two independent 12-bit 4Msps converters with hardware averaging - enables synchronized current/voltage sensing in motor control |
| Ultra-Low-Power STANDBY | 1.5µA retention mode with RTC, SRAM, and registers preserved - ideal for always-on vehicle occupancy detection |
| CAN-FD Interface | Supports data rates up to 5Mbps with flexible data length; backward-compatible with legacy CAN 2.0 networks |
| Integrated VREF & GPAMP | Configurable 1.4V/2.5V shared reference and general-purpose amplifier - reduces external component count in sensor front-ends |
| Secure Peripherals | AES-128/256, TRNG, and CRC-16/32 - enables secure boot, encrypted firmware updates, and message integrity checking |
Applications
| Automotive Body Electronics | Steering Wheel Systems |
|---|---|
Use Scenario: Centralized control of door modules, mirror actuators, and interior lighting with LIN/CAN coordination. IC Role / Device Role / Timing Role: Main MCU managing multi-sensor inputs, PWM-driven LED dimming, and CAN-FD gateway functions. Use Value: 64KB flash supports complex lighting sequences; ASIL B compliance meets OEM functional safety requirements for Class B systems. |
Use Scenario: Real-time torque feedback, button press detection, and haptic response in premium steering wheels. IC Role / Device Role / Timing Role: Sensor fusion hub processing ADC inputs from force sensors and rotary encoders with sub-100µs latency. Use Value: Dual 4Msps ADCs enable simultaneous sampling of multiple analog channels; STANDBY mode maintains wake-on-button capability at <2µA. |
| Door Handle Modules | Vehicle Occupancy Detection |
Use Scenario: Proximity sensing, capacitive touch, and mechanical actuation in smart door handles with anti-theft logic. IC Role / Device Role / Timing Role: Low-power controller executing proximity algorithms, driving solenoids, and communicating via CAN-FD to body ECU. Use Value: 28-pin VSSOP fits tight mechanical envelopes; 5V-tolerant open-drain I/O interfaces directly with legacy touch sensors. |
Use Scenario: Multi-zone seat pressure mapping using resistive or capacitive arrays to detect occupant presence and position. IC Role / Device Role / Timing Role: Analog front-end processor acquiring and preprocessing sensor data before CAN-FD transmission to airbag ECU. Use Value: Hardware-averaged 14-bit ADC resolution ensures accurate weight classification; AES encryption secures occupant data in transit. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MSPM0G3105QDGS28RQ1 | 32KB flash, 16KB SRAM, same 28-pin VSSOP package and peripheral set | Suitable for simpler body control units with lower code footprint and reduced RAM needs | Select when application firmware size remains below 28KB and no future feature expansion is planned |
| MSPM0G3107QDGS28RQ1 | 128KB flash, 32KB SRAM, identical package and pinout - drop-in upgrade path | Required for OTA-capable modules, advanced diagnostics, or multi-protocol gateways needing larger code space | Choose for long-lifecycle designs requiring headroom for firmware updates and feature additions without PCB change |
Compared with M0G3106QDGS28RQ1, the M0G3105QDGS28RQ1 reduces memory capacity for cost-sensitive entry-level modules, while the M0G3107QDGS28RQ1 provides scalable flash headroom for evolving automotive software stacks - all sharing identical 28-pin VSSOP packaging and ASIL B qualification.
Availability
M0G3106QDGS28RQ1 is available at Aetrix Electronics and suitable for automotive body electronics, steering wheel systems, door handle modules, and vehicle occupancy detection requiring stable component supply across extended temperature and safety-critical operating conditions.
Supply support for M0G3106QDGS28RQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with deep automotive expertise and long-term product longevity commitment.
The MSPM0G310x-Q1 family targets cost-optimized, ultra-low-power automotive MCUs with integrated analog peripherals and functional safety features - designed specifically for body control, lighting, and sensor fusion applications in AEC-Q100 Grade 1 environments.
FAQ
What is the maximum operating frequency of the M0G3106QDGS28RQ1?
The M0G3106QDGS28RQ1 operates at up to 80MHz using its internal PLL, which is locked to the 4–32MHz SYSOSC or external HFXT crystal. This frequency is fully supported across the –40°C to +125°C automotive temperature range and is validated for sustained operation under AEC-Q100 Grade 1 conditions. The M0G3106QDGS28RQ1 achieves deterministic real-time performance for motor control and sensor acquisition tasks.
Does the M0G3106QDGS28RQ1 support CAN-FD and legacy CAN 2.0 simultaneously?
The M0G3106QDGS28RQ1 features a single CAN-FD controller that is fully backward-compatible with CAN 2.0 A/B protocols. It does not support concurrent operation of separate CAN 2.0 and CAN-FD networks on different buses; however, it can dynamically switch frame formats and bit rates (up to 5Mbps) within the same physical layer. The M0G3106QDGS28RQ1 uses one set of CAN_TX/CAN_RX pins (PA12/PA13) for all modes.
How many analog input channels are accessible on the 28-pin VSSOP package of the M0G3106QDGS28RQ1?
The M0G3106QDGS28RQ1 in the 28-pin VSSOP package provides 11 external analog input channels: A0_0 through A0_7 and A1_0 through A1_2. These are distributed across two ADC banks (ADC0 and ADC1), with A0_x mapped to ADC0 and A1_x to ADC1. All 11 channels are accessible on the DGS28 package - confirmed in Table 5-1 and Figure 6-7 of the SLASF86C datasheet.
Is the M0G3106QDGS28RQ1 pin-compatible with other members of the MSPM0G310x-Q1 family in the same package?
Yes - the M0G3106QDGS28RQ1 is fully pin-compatible with M0G3105QDGS28RQ1 and M0G3107QDGS28RQ1 in the 28-pin VSSOP (DGS28) package. All share identical pin numbering, signal assignments, power domains, and peripheral mappings. This allows direct substitution during prototyping or production ramp without PCB redesign, provided firmware accommodates differing flash/SRAM capacities.
What debug interface does the M0G3106QDGS28RQ1 support, and how many pins does it require?
The M0G3106QDGS28RQ1 supports 2-pin Serial Wire Debug (SWD) using PA19 (SWDIO) and PA20 (SWCLK). No additional reset or power pins are required for basic debug functionality. This minimal interface enables in-system programming and real-time tracing via standard ARM-compliant debug probes, reducing board space and connector complexity compared to JTAG.
M0G3106QDGS28RQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 28-TFSOP (0.118", 3.00mm Width)
- Series:
- MSPM0 G
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M0+
- Core Size:
- 32-Bit
- Speed:
- 80MHz
- Connectivity:
- CANbus, DALI, I2C, IrDA, LINbus, SmartCard, SMBus, SPI, UART/USART
- Peripherals:
- AES, Brown-out Detect/Reset, DMA, POR, PWM, TRNG, WDT
- Number of I/O:
- 24
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.62V ~ 3.6V
- Data Converters:
- A/D 11x12b SAR
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
M0G3106QDGS28RQ1 FAQ
1.How can I place an order for M0G3106QDGS28RQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for M0G3106QDGS28RQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M0G3106QDGS28RQ1 reliable?
The price and inventory of M0G3106QDGS28RQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M0G3106QDGS28RQ1 is usually 5 days.
3.What payment methods are accepted for M0G3106QDGS28RQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M0G3106QDGS28RQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M0G3106QDGS28RQ1?
M0G3106QDGS28RQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M0G3106QDGS28RQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M0G3106QDGS28RQ1?
For technical support, including M0G3106QDGS28RQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M0G3106QDGS28RQ1 requirements.
6.How does Aetrix verify that M0G3106QDGS28RQ1 is sourced from the original manufacturer or authorized distributors?
All M0G3106QDGS28RQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M0G3106QDGS28RQ1 meets industry standards.
7.What is the process for return or replacement of M0G3106QDGS28RQ1?
All M0G3106QDGS28RQ1 units undergo pre-shipment inspection (PSI). If there is an issue with M0G3106QDGS28RQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M0G3106QDGS28RQ1 part is unused and in its original packaging.
Return procedure for M0G3106QDGS28RQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
M0G3106QDGS28RQ1 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

