STMicroelectronics M24128-BFMN6TP
- Part No.:
- M24128-BFMN6TP
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
M24128-BFMN6TP.pdf
- Description:
- IC EEPROM 128KBIT I2C 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:6,589
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Product details
Overview
M24128-BFMN6TP from STMicroelectronics is a 128-Kbit (16-Kbyte) I²C-compatible serial EEPROM organized as 16 K × 8 bits, operating from 1.7 V to 5.5 V over –40 °C to +85 °C, supporting 1 MHz Fast-mode Plus I²C, with 64-byte page write and hardware write protection via WC pin - used in industrial sensor calibration storage and embedded system configuration retention.
For engineers reviewing the M24128-BFMN6TP datasheet, M24128-BFMN6TP pinout, M24128-BFMN6TP application, or M24128-BFMN6TP equivalent, key selection criteria include supply voltage range compatibility (1.7–5.5 V), 5 ms max byte/page write time, 4 million write cycles, 200-year data retention, and TSSOP8 package footprint with E0–E2 addressable device select code.
Technical Context
This EEPROM implements an I²C target-only interface with full support for Standard-mode (100 kHz), Fast-mode (400 kHz), and Fast-mode Plus (1 MHz) clock rates. It uses internal high-voltage generation for write/erase operations and includes on-chip ECC logic (for process letters A/K) that corrects single-bit errors per 4-byte group without protocol visibility.
Memory organization comprises 16,384 bytes across 256 pages of 64 bytes each; the DFN5 variant disables E0–E2 pins (read as 000), fixing device address to 1010000R/W. Write control (WC) is active-high hardware protection, disabling all writes when asserted, while SDA operates open-drain with external pull-up required.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 128 Kbit (16 K × 8), enabling storage of firmware parameters or calibration data for mid-complexity embedded systems |
| I²C speed modes | Supports 100 kHz, 400 kHz, and 1 MHz - allows integration into high-speed microcontroller buses without timing bottlenecks |
| Page size | 64-byte page write - reduces transaction overhead vs. byte-write; requires address alignment within same page boundary |
| Write endurance | ≥4 million write cycles - supports frequent field updates in telemetry or logging applications |
| Data retention | ≥200 years at 85 °C - ensures long-term reliability in unattended infrastructure deployments |
| Supply voltage | 1.7 V to 5.5 V (–40 °C to +85 °C) - interoperable with 1.8 V, 3.3 V, and 5 V logic domains without level shifters |
| Write protection | Hardware WC pin - prevents accidental overwrites during power transients or firmware glitches without software intervention |
Pinout & Package
Package: TSSOP8 (169 mil width), RoHS-compliant ECOPACK2, 8-lead thin shrink small outline package with standard pin 1 marking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VSS | Ground reference | Return path for all internal circuitry; must be low-impedance connection to system ground plane |
| WC | Write control input | Active-high signal disabling all write operations; tied high for permanent protection, low or floating for normal write access |
| E1 | Chip enable bit 1 | Part of 3-bit device address (E2–E0); sets b2 of 7-bit I²C address (1010xxxR/W); must be hardwired to VCC or VSS |
| E0 | Chip enable bit 0 | LSB of device address; determines unique I²C address among up to 8 devices on same bus segment |
| VCC | Supply voltage | Power input requiring 10–100 nF decoupling capacitor placed adjacent to pin for stable operation during write cycles |
| E2 | Chip enable bit 2 | MSB of device address (b3); enables multi-device addressing without external multiplexing |
| SCL | Serial clock input | Master-generated clock synchronizing all I²C transactions; must meet setup/hold timing relative to SDA transitions |
| SDA | Serial data I/O | Open-drain bidirectional line requiring external pull-up; supports wired-AND bus topology with multiple targets |
Key Features
| Feature | Design Value |
|---|---|
| Fast-mode Plus I²C (1 MHz) | Enables sub-100 µs address+data transmission for 64-byte pages, reducing host CPU wait time in real-time systems |
| Hardware write protection (WC) | Eliminates need for software lock bits or command sequences - critical for fail-safe configuration storage in safety-critical systems |
| Enhanced ESD/latch-up immunity | Withstands ≥4 kV HBM ESD and robust latch-up immunity - suitable for industrial environments with noisy power rails |
| Identification page (64-byte) | Dedicated locked memory region for storing immutable device IDs or cryptographic keys - accessible only via distinct I²C address prefix (1011xxxR/W) |
| Automatic address increment | Internal counter advances after each read/write, enabling efficient sequential access without repeated address retransmission |
Applications
| Industrial Sensor Calibration | Smart Meter Firmware Storage |
|---|---|
Use Scenario: Storing factory-calibrated temperature/pressure coefficients and linearization tables in environmental monitoring nodes. IC Role / Device Role / Timing Role: Nonvolatile configuration storage with guaranteed 200-year retention and 4M-cycle endurance for field recalibration events. Use Value: Eliminates need for battery-backed SRAM; supports remote recalibration over LoRaWAN without risking parameter corruption during brownouts. | Use Scenario: Holding tariff schedules, metering constants, and security keys in ANSI C12.19-compliant electricity meters. IC Role / Device Role / Timing Role: Secure, tamper-resistant parameter storage with hardware write lock (WC) and identification page for device binding. Use Value: Meets ANSI C12.22 encryption key persistence requirements while enabling firmware update rollback via version-stamped config blocks. |
| Automotive Body Control Module | Medical Infusion Pump Settings |
Use Scenario: Retaining seat/mirror position presets, lighting profiles, and door lock configurations across ignition cycles in 12 V vehicle systems. IC Role / Device Role / Timing Role: Low-voltage EEPROM (1.7 V operation) interfacing directly with 3.3 V MCU I²C bus under cold-crank conditions. Use Value: Maintains user preferences during battery voltage dips to 6 V without external regulators or brownout detection circuitry. | Use Scenario: Storing drug library parameters, dose limits, and clinician authorization tokens in FDA Class II infusion pumps. IC Role / Device Role / Timing Role: Safety-critical nonvolatile memory with ECC-enabled reads and hardware write lock preventing runtime parameter corruption. Use Value: Supports IEC 62304 SW safety classification by eliminating single-point failure modes in configuration data path. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C128C-SSHL-T | 128 Kbit I²C EEPROM, 1.7–5.5 V, but only supports up to 400 kHz I²C; no identification page or ECC | Lacks hardware write protection pin (WC) and dedicated ID page - requires software-based locking and external key management | Select when cost sensitivity outweighs need for 1 MHz speed, ECC, or secure ID storage |
| BR24G128FJ-3GE2 | 128 Kbit I²C EEPROM, 1.6–5.5 V, supports 1 MHz, but uses different device addressing (no E0–E2 pins) and lacks WC pin | No hardware write control; relies on software lock bits - increases firmware complexity and vulnerability to reset-induced corruption | Choose for ultra-low-voltage operation down to 1.6 V where WC functionality is managed externally |
Compared with AT24C128C-SSHL-T and BR24G128FJ-3GE2, M24128-BFMN6TP uniquely combines 1 MHz I²C, dedicated WC pin, 64-byte ID page, and ECC - making it optimal for safety-critical or high-throughput embedded systems requiring both speed and data integrity.
Availability
M24128-BFMN6TP is available at Aetrix Electronics and suitable for industrial sensor calibration, smart meter firmware storage, and automotive body control modules requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for M24128-BFMN6TP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, designing and manufacturing microcontrollers, analog ICs, MEMS, and discrete components for industrial, automotive, and consumer markets.
M24128-BFMN6TP belongs to ST's M24 serial EEPROM product line, engineered for robustness in harsh environments - emphasizing wide voltage operation, high endurance, and hardware-level data protection for mission-critical embedded storage.
FAQ
What is the function of the WC pin on M24128-BFMN6TP?
The WC (Write Control) pin is an active-high hardware protection input. When driven high, it disables all write operations including byte, page, and identification page writes - the device acknowledges device select and address bytes but returns NO ACK for data bytes. This prevents accidental overwrites during power-up, brownout, or firmware faults without requiring software intervention or lock-bit programming.
Does M24128-BFMN6TP support I²C clock stretching?
No, M24128-BFMN6TP does not support clock stretching. As a pure I²C target device, it relies on internal timing for write cycles and uses ACK polling (via repeated START + device address) to signal readiness. During internal write operations (up to 5 ms), the device releases SDA and ignores bus activity until completion - requiring host-side polling rather than slave-initiated clock hold.
Can the identification page be accessed on all M24128 variants?
No - the 64-byte identification page is exclusive to M24128-D variants (e.g., M24128-DF, M24128-DW). The M24128-BF series, including M24128-BFMN6TP, does not include this feature. Identification page access uses a distinct I²C device address prefix (1011xxxR/W) and supports permanent lock via dedicated instruction - unavailable on BF/BR/BW part numbers per DS6639 Rev 33.
What package type does M24128-BFMN6TP use, and is it pin-compatible with other M24128 variants?
M24128-BFMN6TP uses the TSSOP8 package (169 mil width, ECOPACK2). It shares identical pinout and electrical behavior with other TSSOP8-packaged M24128 variants (e.g., M24128-BWMN6TP), but is not pin-compatible with SO8N, UFDFPN8, or WLCSP8 versions due to differing pad layouts and thermal/mechanical footprints - board layout must match the specific package variant ordered.
M24128-BFMN6TP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 450 ns
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
M24128-BFMN6TP FAQ
1.How can I place an order for M24128-BFMN6TP through Aetrix?
Please submit a Request for Quotation (RFQ) for M24128-BFMN6TP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M24128-BFMN6TP reliable?
The price and inventory of M24128-BFMN6TP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M24128-BFMN6TP is usually 5 days.
3.What payment methods are accepted for M24128-BFMN6TP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M24128-BFMN6TP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M24128-BFMN6TP?
M24128-BFMN6TP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M24128-BFMN6TP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M24128-BFMN6TP?
For technical support, including M24128-BFMN6TP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M24128-BFMN6TP requirements.
6.How does Aetrix verify that M24128-BFMN6TP is sourced from the original manufacturer or authorized distributors?
All M24128-BFMN6TP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M24128-BFMN6TP meets industry standards.
7.What is the process for return or replacement of M24128-BFMN6TP?
All M24128-BFMN6TP units undergo pre-shipment inspection (PSI). If there is an issue with M24128-BFMN6TP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M24128-BFMN6TP part is unused and in its original packaging.
Return procedure for M24128-BFMN6TP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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