STMicroelectronics M24128-BWMN6TP
- Part No.:
- M24128-BWMN6TP
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
M24128-BWMN6TP.pdf
- Description:
- IC EEPROM 128KBIT I2C 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:12,903
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
M24128-BWMN6TP from STMicroelectronics is a 128-Kbit (16-Kbyte) I²C-compatible serial EEPROM organized as 16 K × 8 bits, operating from 2.5 V to 5.5 V over -40 °C to +85 °C, supporting 1 MHz Fast-mode Plus, 400 kHz Fast-mode, and 100 kHz Standard-mode I²C bus protocols, with 64-byte page write capability and hardware write protection via WC pin - used in industrial sensor calibration storage and embedded system configuration retention.
For engineers reviewing the M24128-BWMN6TP datasheet, M24128-BWMN6TP pinout, M24128-BWMN6TP application, or M24128-BWMN6TP equivalent, key selection considerations include supply voltage range compatibility (2.5–5.5 V), I²C clock mode support (up to 1 MHz), page write timing (≤5 ms), WC-controlled hardware write protection, and SO8N/TSSOP8/WLCSP8 package variants for space-constrained PCB layouts.
Technical Context
The device implements a fully compliant I²C target interface with start/stop detection, ACK/NACK handshaking, and 7-bit device addressing with three chip-enable inputs (E2–E0) for multi-device bus configuration. It uses internal high-voltage generation and ECC logic (on process-A/K variants) to correct single-bit errors per 4-byte group during read operations.
Memory access supports random address read (via dummy write + restart), current address read, and sequential read modes; write operations include byte write, 64-byte page write (with automatic rollover), and - on M24128-D variants - identification page programming and permanent lock. Write control (WC) disables all data writes when high, while allowing device select/address byte acknowledgment.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 128 Kbit (16 K × 8 bits) - provides sufficient nonvolatile storage for firmware parameters, calibration coefficients, or device identity data in resource-limited microcontroller systems. |
| I²C speed modes | 1 MHz (Fast-mode Plus), 400 kHz (Fast-mode), 100 kHz (Standard-mode) - enables flexible integration with legacy and high-speed controllers without protocol translation. |
| Supply voltage | 2.5 V to 5.5 V - compatible with 3.3 V and 5 V logic domains, eliminating need for level shifters in mixed-voltage designs. |
| Write cycle time | ≤5 ms for byte and page writes - reduces firmware blocking time during configuration updates and enables responsive field-programmable behavior. |
| Data retention | >200 years - ensures long-term reliability of stored settings across product lifetime without refresh cycles. |
| Endurance | >4 million write cycles - supports frequent logging or dynamic parameter updates in telemetry and control applications. |
| Operating temperature | -40 °C to +85 °C - qualified for industrial and automotive under-hood environments where thermal stability is critical. |
Pinout & Package
Package: SO8N (150 mil width, ECOPACK2-compliant). Pinout validated per DS6639 Rev 33 Figure 2 and Table 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VSS | Ground reference | Return path for all internal circuitry; must be low-impedance and decoupled near package pins to suppress noise-induced I²C glitches. |
| WC | Hardware write control input | Active-high signal that disables all write operations (byte/page/ID page) while still acknowledging device address - prevents accidental corruption during power transients or firmware faults. |
| E1 | Chip enable input | Part of 3-bit chip address (E2–E0); tied to VSS or VCC to configure device select code (1010 E2 E1 E0 RW) - enables up to 8 devices on same I²C bus. |
| E0 | Chip enable input | LSB of chip address; floating reads as low (0); determines b1 bit of 7-bit I²C address - essential for multi-drop EEPROM topology design. |
| VCC | Supply voltage | Power rail requiring 10–100 nF ceramic decoupling capacitor placed adjacent to pin to stabilize internal HV generator during write cycles. |
| E2 | Chip enable input | MSB of chip address; sets b3 bit in device select code - allows deterministic I²C address assignment without software configuration. |
| SCL | Serial clock input | Master-generated clock synchronizing all data transfers; open-drain compatible with standard I²C pull-up; tolerates 1 MHz edge rates. |
| SDA | Serial data I/O | Open-drain bidirectional line shared across I²C bus; requires external pull-up; supports wired-AND arbitration and ACK/NACK signaling. |
Key Features
| Feature | Design Value |
|---|---|
| Hardware write protection | WC pin disables all writes while preserving address-level ACK - eliminates need for software-based lock bits and prevents corruption during brown-out or reset sequences. |
| 64-byte page write | Enables burst programming of contiguous configuration blocks in ≤5 ms - cuts firmware update time by >90% vs. sequential byte writes. |
| Enhanced ESD/latch-up immunity | Qualified to >4 kV HBM ESD and robust latch-up immunity - ensures reliability in handling-sensitive industrial assembly and field service environments. |
| Identification page (M24128-D) | 64-byte dedicated area for factory-programmed security keys or calibration data, permanently lockable to read-only - supports secure boot and traceability requirements. |
| Automatic address increment | Internal counter advances after each read/write - simplifies sequential access in firmware without manual address management. |
Applications
| Industrial Sensor Calibration | Smart Meter Firmware Storage |
|---|---|
|
Use Scenario: Storing temperature, offset, and gain coefficients for analog sensor front-ends in programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile configuration register holding factory-trimmed calibration data accessed at power-on initialization. Use Value: Enables one-time calibration during manufacturing and eliminates need for external trim pots or host MCU flash partitioning. |
Use Scenario: Retaining tariff tables, meter ID, and firmware version metadata across power cycles in ANSI C12.22-compliant electricity meters. IC Role / Device Role / Timing Role: Secure, tamper-resistant parameter store interfaced via I²C to metrology SoC during boot and firmware update. Use Value: Supports regulatory compliance with >200-year data retention and hardware write protection against unauthorized reprogramming. |
| Medical Device Configuration | Automotive Body Control Module |
|
Use Scenario: Saving user preferences (e.g., display brightness, alarm thresholds) and device serial number in portable diagnostic equipment. IC Role / Device Role / Timing Role: Low-power, I²C-accessible memory mapped into MCU's peripheral address space for runtime parameter access. Use Value: Meets IEC 62304 Class B software safety requirements via deterministic write timing (≤5 ms) and hardware lock capability. |
Use Scenario: Storing door lock actuator calibration, mirror position presets, and seat memory profiles in 12 V automotive ECUs. IC Role / Device Role / Timing Role: Voltage-tolerant (2.5–5.5 V) EEPROM interfaced to CAN gateway MCU for persistent user setting storage. Use Value: Operates reliably across automotive battery transients (-40 °C to +85 °C) with >4 million endurance cycles for frequent user adjustments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C128C-SSHM-T | 128 Kbit I²C EEPROM, 1.7–5.5 V supply, 1 MHz max clock, SO8N package, no WC pin, no identification page. | Lacks hardware write control and ID page - requires software-based protection and external key management. | Select when board space permits larger footprint and hardware write disable is not required for safety-critical use. |
| BR24G128FJ-WE2 | 128 Kbit I²C EEPROM, 1.6–5.5 V supply, 1 MHz max clock, TSSOP8, includes WP pin (functionally equivalent to WC), no ID page. | Same hardware write protection but no identification page - limits secure key storage capability. | Prefer for ultra-low-voltage (1.6 V) operation in battery-powered devices where ID page functionality is unnecessary. |
Compared with AT24C128C-SSHM-T and BR24G128FJ-WE2, the M24128-BWMN6TP uniquely combines WC-based hardware write disable, 2.5–5.5 V optimized voltage range, and - on D-variant - lockable identification page, making it optimal for industrial and medical systems requiring both robustness and secure parameter storage.
Availability
M24128-BWMN6TP is available at Aetrix Electronics and suitable for industrial sensor calibration, smart meter firmware storage, medical device configuration, and automotive body control module applications requiring stable component supply, long-term lifecycle assurance, and ECOPACK2-compliant packaging.
Supply support for M24128-BWMN6TP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.
The M24128 series belongs to ST's serial EEPROM product line, engineered specifically for robust, low-power, I²C-based nonvolatile storage in harsh environments - emphasizing write endurance, data retention, and hardware-level security features.
FAQ
What is the function of the WC pin on M24128-BWMN6TP?
The WC (Write Control) pin is an active-high hardware protection input. When driven high, it disables all write operations (byte, page, and identification page) while still acknowledging device address and memory address bytes. This prevents accidental data corruption during power-up, brown-out, or firmware exceptions without requiring software intervention.
Does M24128-BWMN6TP support 1 MHz I²C communication?
Yes, M24128-BWMN6TP supports Fast-mode Plus I²C operation up to 1 MHz, as confirmed in DS6639 Rev 33 Section 1. It maintains full timing compliance including setup/hold times and ACK response within this mode, enabling high-throughput configuration updates in time-sensitive embedded systems.
Can the M24128-BWMN6TP be used in 1.8 V systems?
No - the M24128-BWMN6TP variant is specified for 2.5 V to 5.5 V operation only. For 1.8 V systems, ST offers the M24128-BR variant (1.8–5.5 V), which shares identical pinout and functionality but differs in voltage rating and process qualification; mixing variants risks functional failure below 2.5 V.
Is the identification page available on M24128-BWMN6TP?
No - the identification page (64-byte, lockable) is exclusive to M24128-D variants (e.g., M24128-DF, M24128-DW). The M24128-BW family, including M24128-BWMN6TP, does not implement this feature; its memory map consists solely of the main 16-Kbyte array with no dedicated ID page or lock instruction support.
M24128-BWMN6TP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 450 ns
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
M24128-BWMN6TP FAQ
1.How can I place an order for M24128-BWMN6TP through Aetrix?
Please submit a Request for Quotation (RFQ) for M24128-BWMN6TP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M24128-BWMN6TP reliable?
The price and inventory of M24128-BWMN6TP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M24128-BWMN6TP is usually 5 days.
3.What payment methods are accepted for M24128-BWMN6TP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M24128-BWMN6TP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M24128-BWMN6TP?
M24128-BWMN6TP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M24128-BWMN6TP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M24128-BWMN6TP?
For technical support, including M24128-BWMN6TP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M24128-BWMN6TP requirements.
6.How does Aetrix verify that M24128-BWMN6TP is sourced from the original manufacturer or authorized distributors?
All M24128-BWMN6TP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M24128-BWMN6TP meets industry standards.
7.What is the process for return or replacement of M24128-BWMN6TP?
All M24128-BWMN6TP units undergo pre-shipment inspection (PSI). If there is an issue with M24128-BWMN6TP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M24128-BWMN6TP part is unused and in its original packaging.
Return procedure for M24128-BWMN6TP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
M24128-BWMN6TP Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
