STMicroelectronics M24C04-DRDW3TP/K
- Part No.:
- M24C04-DRDW3TP/K
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
M24C04-DRDW3TP/K.pdf
- Description:
- IC EEPROM 4KBIT I2C 1MHZ 8TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
M24C04-DRDW3TP/K from STMicroelectronics is an AEC-Q100 Grade 1 qualified 4-Kbit I²C serial EEPROM for automotive applications, operating from -40 °C to 125 °C at 1.7–5.5 V supply. It delivers 1 MHz I²C bus speed, 16-byte page write capability, and includes a dedicated 16-byte identification page with permanent lock functionality. Used in engine control units for calibration storage and fault log retention.
For engineers reviewing the M24C04-DRDW3TP/K datasheet, M24C04-DRDW3TP/K pinout, M24C04-DRDW3TP/K application, or M24C04-DRDW3TP/K equivalent, key selection criteria include automotive temperature compliance (-40 °C to 125 °C), 4 million write cycles at 25 °C, ECC-enabled data integrity, and dual-mode addressing (memory + ID page) via E1/E2 and device type identifier.
Technical Context
The M24C04-DRDW3TP/K implements a true EEPROM array organized as 32 pages × 16 bytes (512 × 8 bits), with embedded single-bit error correction code (ECC x 1) applied per byte during read operations. Its I²C interface supports standard (100 kHz), fast (400 kHz), and fast-plus (1 MHz) modes, with Schmitt-triggered SCL/SDA inputs for robust noise immunity.
It features dual addressing domains: memory access uses device type identifier 1010b with E1/E2-defined chip enable, while the 16-byte identification page uses 1011b and supports separate write, read, and permanent lock instructions. Write protection is controlled by the WC pin, which disables all writes when high.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 4 Kbits (512 bytes), byte-alterable EEPROM array with ECC x 1 per byte for single-bit error correction |
| I²C clock frequency | Up to 1 MHz - enables fast firmware parameter updates in real-time automotive diagnostics |
| Operating temperature | -40 °C to 125 °C - validated per AEC-Q100 Grade 1 for under-hood ECUs and transmission control modules |
| Supply voltage range | 1.7 V to 5.5 V - supports wide-input power rails in 12 V and 48 V vehicle architectures |
| Write endurance | 4 million cycles at 25 °C - ensures >10-year reliability for daily recalibration logging in ADAS controllers |
| Data retention | 50 years at 125 °C - guarantees long-term validity of safety-critical configuration data without refresh |
| Page size | 16 bytes - matches typical CAN message payload length for atomic parameter group writes |
Pinout & Package
Package: TSSOP8 (169 mil width), RoHS-compliant and halogen-free (ECOPACK2®).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: SDA | Serial Data I/O | Open-drain bidirectional bus line; requires external pull-up; supports wire-OR with other I²C devices |
| 2: VSS | Ground | Reference return path for VCC; must be low-impedance connection to minimize noise coupling |
| 3: SCL | Serial Clock Input | Master-generated clock; Schmitt-trigger input ensures reliable timing across voltage and temperature |
| 4: WC | Write Control | Active-high hardware lock: disables all writes when driven high; floating or low enables write access |
| 5: E2 | Chip Enable Bit 2 | Part of 2-bit address select (E2/E1); sets b3/b2 in 7-bit device address; tied high/low to configure I²C bus address |
| 6: NC | No Connect | Internally unused; must remain unconnected per datasheet - no routing or termination required |
| 7: VCC | Supply Voltage | 1.7–5.5 V DC input; requires local 10–100 nF decoupling capacitor adjacent to pin |
| 8: E1 | Chip Enable Bit 1 | Completes 2-bit address select; enables up to four identical devices on same I²C bus with unique addresses |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Grade 1 qualification | Validated for automotive use up to 125 °C ambient - eliminates need for additional qualification testing in Tier 1 designs |
| Dedicated 16-byte identification page | Factory-programmed ST device ID (0x20, 0xE0, 0x09) + user-writable space, lockable permanently to prevent tampering |
| Hardware write protection (WC pin) | Pin-level disable of all write operations - prevents corruption during power transients or software faults |
| Embedded ECC x 1 logic | Automatic single-bit error detection and correction per read - improves functional safety metrics (FIT rate reduction) |
| Fast write cycle | ≤4 ms byte or page write - enables time-critical logging (e.g., crash event capture) without blocking main CPU |
Applications
| Engine Control Unit (ECU) | Advanced Driver Assistance Systems (ADAS) |
|---|---|
|
Use Scenario: Storing adaptive learning parameters (e.g., fuel trim offsets, idle air control corrections) that update dynamically during vehicle operation. IC Role / Device Role / Timing Role: Non-volatile configuration storage with ECC-protected reads and hardware write lock during engine cranking. Use Value: Ensures calibration persistence across 100,000+ ignition cycles while maintaining ASIL-B data integrity requirements. |
Use Scenario: Retaining camera calibration coefficients and sensor fusion bias values after system power-down. IC Role / Device Role / Timing Role: Secure, temperature-stable parameter vault accessed via I²C during boot sequence and runtime re-calibration. Use Value: Enables sub-pixel image alignment accuracy over full automotive temperature range without periodic recalibration. |
| Transmission Control Module (TCM) | Body Control Module (BCM) |
|
Use Scenario: Logging gear shift history and clutch wear metrics for predictive maintenance reporting. IC Role / Device Role / Timing Role: High-endurance write buffer supporting burst writes during shift events, with 4 million-cycle rating at 85 °C. Use Value: Supports 15-year service life with daily 50-shift usage while retaining full diagnostic traceability. |
Use Scenario: Storing user preferences (seat position, mirror angle, lighting profiles) and door lock configuration states. IC Role / Device Role / Timing Role: Low-power, I²C-accessible non-volatile memory with 1.7 V operation for battery-backed retention during sleep mode. Use Value: Maintains settings through 12 V battery drain scenarios down to 1.7 V without data loss or corruption. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C04D-SSHM-T (Microchip) | 4-Kbit I²C EEPROM, AEC-Q100 Grade 2 (−40 °C to 105 °C), no identification page or ECC | Limited to cabin electronics; not suitable for under-hood 125 °C environments | Select only if Grade 2 temp range suffices and ECC/ID page are unnecessary |
| BR24G04FJ-3GE2 (ROHM) | 4-Kbit I²C EEPROM, AEC-Q100 Grade 1, 1.7–5.5 V, but lacks dedicated ID page and permanent lock feature | Supports same temperature range but offers no factory ID or secure parameter locking | Choose when basic EEPROM function is sufficient and ST's ID page security is not required |
Compared with AT24C04D-SSHM-T and BR24G04FJ-3GE2, the M24C04-DRDW3TP/K uniquely combines AEC-Q100 Grade 1 operation, ECC-per-byte reliability, and a factory-verified, lockable identification page - making it the only option among the three qualified for safety-critical ECU firmware parameter storage.
Availability
M24C04-DRDW3TP/K is available at Aetrix Electronics and suitable for engine control units, ADAS camera modules, transmission control systems, and body control modules requiring stable component supply across automotive production lifecycles.
Supply support for M24C04-DRDW3TP/K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and memory solutions for automotive, industrial, and consumer markets.
The M24C04-DRDW3TP/K belongs to ST's automotive-grade serial EEPROM product line, engineered specifically for mission-critical data retention in harsh-temperature vehicle subsystems where reliability, longevity, and functional safety are mandatory.
FAQ
What is the function of the WC pin on the M24C04-DRDW3TP/K?
The WC (Write Control) pin is an active-high hardware lock that disables all write operations to both the main memory array and the identification page when driven high. When low or floating, writes are enabled. This provides deterministic, glitch-immune protection against unintended writes during power-up, brown-out, or software exceptions - critical for automotive safety integrity.
How does the identification page differ from the main memory array?
The identification page is a dedicated 16-byte region accessible via device type identifier 1011b (vs. 1010b for main memory). It contains factory-programmed ST device ID bytes (0x20, 0xE0, 0x09) and user-writable space. Unlike main memory, it supports a permanent lock instruction that disables all future writes - enabling secure storage of calibration keys or cryptographic identifiers.
Is ECC applied to the identification page as well as main memory?
No. The embedded ECC x 1 logic applies only to the main 512-byte memory array (32 × 16-byte pages). The identification page has no ECC protection. However, its permanent lock capability and factory-programmed ID bytes provide complementary data integrity assurance for identity-critical use cases.
Can the M24C04-DRDW3TP/K operate reliably at 1.7 V and 125 °C simultaneously?
Yes. The device is fully characterized and guaranteed to meet all AC/DC specifications - including 1 MHz I²C operation, 4 ms write cycle, and 4 million write cycles - across the full extended range of 1.7 V to 5.5 V and −40 °C to 125 °C, as validated per AEC-Q100 Grade 1 test conditions in DS10308 Rev 7.
M24C04-DRDW3TP/K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Kbit
- Memory Organization:
- 512 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 4ms
- Access Time:
- 450 ns
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
M24C04-DRDW3TP/K FAQ
1.How can I place an order for M24C04-DRDW3TP/K through Aetrix?
Please submit a Request for Quotation (RFQ) for M24C04-DRDW3TP/K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M24C04-DRDW3TP/K reliable?
The price and inventory of M24C04-DRDW3TP/K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M24C04-DRDW3TP/K is usually 5 days.
3.What payment methods are accepted for M24C04-DRDW3TP/K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M24C04-DRDW3TP/K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M24C04-DRDW3TP/K?
M24C04-DRDW3TP/K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M24C04-DRDW3TP/K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M24C04-DRDW3TP/K?
For technical support, including M24C04-DRDW3TP/K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M24C04-DRDW3TP/K requirements.
6.How does Aetrix verify that M24C04-DRDW3TP/K is sourced from the original manufacturer or authorized distributors?
All M24C04-DRDW3TP/K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M24C04-DRDW3TP/K meets industry standards.
7.What is the process for return or replacement of M24C04-DRDW3TP/K?
All M24C04-DRDW3TP/K units undergo pre-shipment inspection (PSI). If there is an issue with M24C04-DRDW3TP/K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M24C04-DRDW3TP/K part is unused and in its original packaging.
Return procedure for M24C04-DRDW3TP/K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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