STMicroelectronics M24C04-RMN6P
- Part No.:
- M24C04-RMN6P
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
M24C04-RMN6P.pdf
- Description:
- IC EEPROM 4KBIT I2C 400KHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:10,710
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
M24C04-RMN6P from STMicroelectronics is a 4-Kbit I²C-compatible EEPROM organized as 512 × 8 bits, operating at up to 400 kHz clock frequency with 1.8 V to 5.5 V supply voltage, -40 °C to +85 °C temperature range, and 16-byte page write capability. It serves as nonvolatile configuration storage in microcontroller-based systems requiring byte- or page-level writes and hardware write protection via WC pin.
For engineers reviewing the M24C04-RMN6P datasheet, M24C04-RMN6P pinout, M24C04-RMN6P application, or M24C04-RMN6P equivalent, key selection considerations include I²C bus timing compliance (400 kHz), VCC min/max tolerance (1.8–5.5 V), WC-controlled full-array write protection, 4M write endurance, and DFN8 (2 × 3 mm) ECOPACK2 package compatibility with automated SMT assembly.
Technical Context
The M24C04-RMN6P implements a standard I²C slave protocol with 7-bit device address (1010xxx0/1), supporting START/STOP detection, ACK/NACK handshaking, and current-address, random-address, and sequential read modes. Its internal architecture includes an HV generator for EEPROM programming, page latches for burst writes, and a POR circuit ensuring safe power-up behavior.
Write control (WC) is a dedicated active-high input that disables all write operations-including byte and page writes-when asserted, while preserving read functionality. Chip enable pins E1/E2 are internally tied to logic 0 in the UFDFPN8 (MC) package variant, fixing the device address to 101000xR/W and eliminating external address strapping.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 4 Kbit (512 × 8), sufficient for firmware calibration tables or device ID storage in space-constrained designs |
| I²C clock frequency | Up to 400 kHz - supports fast configuration loading without requiring high-speed MCU peripherals |
| Supply voltage range | 1.8 V to 5.5 V - interoperable with 1.8 V logic domains and legacy 3.3/5 V systems |
| Page size | 16 bytes - enables efficient bulk writes within single I²C transactions, minimizing bus occupancy |
| Write cycle endurance | 4 million cycles at 25 °C - supports frequent parameter updates in industrial logging or adaptive control applications |
| Data retention | 200 years at 55 °C - ensures long-term reliability in unattended or sealed deployments |
| Operating temperature | -40 °C to +85 °C - qualified for automotive cabin, industrial PLC, and outdoor IoT node environments |
| ESD rating | ±3000 V HBM - robust against handling and board-level electrostatic events during manufacturing and field service |
Pinout & Package
Package: UFDFPN8 (MC), also known as DFN8, 2 mm × 3 mm, 0.5 mm pitch, ECOPACK2 RoHS-compliant and halogen-free. Pin 1 marked by top-side dot; exposed thermal pad (EP) electrically connected to VSS.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SDA) | Serial data I/O | Open-drain bidirectional bus line; requires external pull-up resistor (typically 2.2–10 kΩ to VCC) |
| 2 (SCL) | Serial clock input | Master-generated clock; rising edge samples SDA, falling edge allows SDA transition |
| 3 (WC) | Write control input | Active-high hardware lock: when high, all write instructions are ignored and data bytes receive NACK |
| 4 (VSS) | Ground reference | Common return path for all signals and internal circuitry; must be low-impedance connection |
| 5 (VCC) | Supply voltage | 1.8–5.5 V DC; decoupling capacitor (10–100 nF) required near pin for stable operation during write cycles |
| 6 (E2) | Chip enable (LSB) | Tied internally to logic 0 in UFDFPN8; fixes b2 of device address to '0' per Table 2 |
| 7 (E1) | Chip enable (MSB) | Tied internally to logic 0 in UFDFPN8; fixes b3 of device address to '0', yielding fixed 101000xx address |
| 8 (NC) | No connect | Not bonded; left floating or grounded - no electrical function |
Key Features
| Feature | Design Value |
|---|---|
| Hardware write protection | WC pin disables all writes globally - eliminates software bugs or bus glitches from corrupting stored parameters |
| ECOPACK2 packaging | UFDFPN8 (2 × 3 mm) enables high-density PCB layouts and reflow-compatible assembly without leaded alternatives |
| 400 kHz I²C interface | Faster than legacy 100 kHz EEPROMs - cuts configuration load time by up to 4× in boot-critical paths |
| 16-byte page write | Reduces I²C transaction overhead vs. byte writes - e.g., 16-byte calibration set written in one STOP-terminated sequence |
| Power-on reset (POR) | Prevents spurious writes during VCC ramp-up - ensures deterministic startup behavior across supply slew rates |
| Roll-over addressing | Sequential reads wrap from 1FFh to 00h - simplifies circular buffer implementations without address boundary checks |
Applications
| Industrial Sensor Calibration | Automotive Body Control Module |
|---|---|
Use Scenario: Storing factory-trimmed offset/gain coefficients for analog sensor front-ends in programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed once per power cycle during ADC initialization. Use Value: Enables field-replaceable sensors with unique calibration data retained across 200+ years without battery backup. | Use Scenario: Holding seat position presets, mirror angles, and lighting profiles in vehicle door modules. IC Role / Device Role / Timing Role: I²C slave storing user preferences updated infrequently but read on every ignition cycle. Use Value: 4 M write cycles support >10 years of daily adjustments at 1000 cycles/year, meeting OEM durability requirements. |
| Smart Meter Firmware Patch Storage | Medical Infusion Pump Parameter Logs |
Use Scenario: Holding encrypted firmware patch fragments received over PLC or RF link before secure installation. IC Role / Device Role / Timing Role: Secure, tamper-resistant staging area for code updates - write-protected until cryptographic verification completes. Use Value: WC pin allows hardware-gated write enable only after signature validation, preventing malicious or corrupted patch injection. | Use Scenario: Recording dose history, error timestamps, and maintenance counters in Class IIa infusion pumps. IC Role / Device Role / Timing Role: Fail-safe event logger with guaranteed write completion detection via ACK polling. Use Value: 5 ms max write time and ACK-polling support ensure deterministic logging latency under IEC 62304 safety constraints. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar I²C EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C04D-SSHM-T (Microchip) | Same 4-Kbit density, 1.7–5.5 V VCC, but uses 100 kHz/400 kHz dual-mode I²C; no WC pin - write protection via software address locking only | Lacks hardware write disable; unsuitable where physical bus access could permit unintended writes | Select if cost sensitivity outweighs need for hardware-level write lock, and system firmware can enforce strict address-range access control |
| BR24G04FJ-WE2 (ROHM) | 4-Kbit, 1.6–5.5 V, includes built-in WC pin and same 16-byte page size; rated for -40 °C to +105 °C extended temp range | Higher max operating temperature supports under-hood or high-power enclosure use cases beyond M24C04-RMN6P's +85 °C limit | Select for automotive engine bay or industrial drive applications requiring >85 °C ambient operation with identical pinout and protocol behavior |
Compared with AT24C04D-SSHM-T and BR24G04FJ-WE2, the M24C04-RMN6P offers optimal balance of 1.8 V low-voltage operation, hardware WC protection, and ECOPACK2 DFN8 footprint - making it preferred for space-constrained, safety-critical, or mixed-voltage embedded systems where deterministic write disable is mandatory.
Availability
M24C04-RMN6P is available at Aetrix Electronics and suitable for industrial sensor nodes, automotive body electronics, smart metering systems, and medical device data logging requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for M24C04-RMN6P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and memory products for industrial, automotive, and consumer markets.
The M24C04-R series belongs to ST's serial EEPROM product line, engineered specifically for reliable, low-voltage I²C configuration storage in resource-constrained embedded systems where hardware write protection and extended temperature resilience are essential.
FAQ
What is the function of the WC pin on M24C04-RMN6P?
The WC (Write Control) pin is an active-high input that globally disables all write operations - including byte and page writes - when driven high. When WC = high, the device acknowledges device select and address bytes but returns NACK for data bytes, preventing memory corruption. Write operations resume only when WC is low or floating. This hardware lock operates independently of I²C commands and remains effective across power cycles.
Does M24C04-RMN6P support 100 kHz I²C mode in addition to 400 kHz?
Yes, the M24C04-RMN6P is fully compatible with both standard-mode (100 kHz) and fast-mode (400 kHz) I²C bus operation. Its AC timing specifications meet I²C specification requirements across the full 1.8–5.5 V supply range and -40 °C to +85 °C temperature range. No configuration register or external component is needed to switch between modes - bus speed is determined solely by the master's SCL frequency.
How does the DFN8 (UFDFPN8) package differ from SO8N or TSSOP8 variants in terms of pinout?
The M24C04-RMN6P in UFDFPN8 (MC) package has identical signal mapping to SO8N and TSSOP8 versions but omits the NC pin (pin 8) and ties E1/E2 internally to logic 0. Pin 1 is SDA, pin 2 is SCL, pin 3 is WC, pin 4 is VSS, pin 5 is VCC, pin 6 is E2, pin 7 is E1, and pin 8 is NC. Unlike SO8N/TSSOP8, no external strapping of E1/E2 is possible - the device address is permanently fixed to 101000xx, simplifying bus arbitration in multi-device systems.
Can M24C04-RMN6P retain data for 200 years at room temperature?
Yes - the 200-year data retention specification is validated at 55 °C per JEDEC JESD22-A117 stress testing. At 25 °C, extrapolated retention exceeds 500 years based on Arrhenius modeling and qualification results. This value reflects actual measured cell charge loss under accelerated conditions, not theoretical projection. Retention assumes proper write cycling (≤4M cycles) and storage within specified voltage and temperature limits.
M24C04-RMN6P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Kbit
- Memory Organization:
- 512 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
M24C04-RMN6P FAQ
1.How can I place an order for M24C04-RMN6P through Aetrix?
Please submit a Request for Quotation (RFQ) for M24C04-RMN6P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M24C04-RMN6P reliable?
The price and inventory of M24C04-RMN6P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M24C04-RMN6P is usually 5 days.
3.What payment methods are accepted for M24C04-RMN6P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M24C04-RMN6P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M24C04-RMN6P?
M24C04-RMN6P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M24C04-RMN6P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M24C04-RMN6P?
For technical support, including M24C04-RMN6P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M24C04-RMN6P requirements.
6.How does Aetrix verify that M24C04-RMN6P is sourced from the original manufacturer or authorized distributors?
All M24C04-RMN6P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M24C04-RMN6P meets industry standards.
7.What is the process for return or replacement of M24C04-RMN6P?
All M24C04-RMN6P units undergo pre-shipment inspection (PSI). If there is an issue with M24C04-RMN6P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M24C04-RMN6P part is unused and in its original packaging.
Return procedure for M24C04-RMN6P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
M24C04-RMN6P Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
