STMicroelectronics M24C32-FMC6TG
- Part No.:
- M24C32-FMC6TG
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-UFDFN Exposed Pad
- Datasheet:
-
M24C32-FMC6TG.pdf
- Description:
- IC EEPROM 32KBIT I2C 8UFDFPN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
M24C32-FMC6TG from STMicroelectronics is a 32-Kbit I²C-compatible EEPROM organized as 4 K × 8 bits, operating from 1.7 V to 5.5 V over –40 °C to +85 °C, with 32-byte page write capability, hardware write protection via WC pin, and enhanced ESD/latch-up immunity. It serves as nonvolatile configuration storage in industrial sensor nodes, power supply monitors, and embedded control modules requiring reliable parameter retention across power cycles.
For engineers reviewing the M24C32-FMC6TG datasheet, M24C32-FMC6TG pinout, M24C32-FMC6TG application, or M24C32-FMC6TG equivalent, key selection considerations include I²C bus mode support (up to 1 MHz), identification page availability (in DF variant), WC-controlled full-array write lock, and compatibility with SO8N/TSSOP8/UFDFPN8/UFDFPN5 packages - all critical for footprint-constrained, low-voltage, and high-reliability designs.
Technical Context
This EEPROM implements a standard I²C target protocol with 7-bit device addressing, supporting Standard (100 kHz), Fast (400 kHz), and Fast Mode Plus (1 MHz) clock rates. Its internal architecture includes an auto-incrementing address counter, page-aligned write logic (32-byte boundaries), and dedicated identification page access using distinct device type identifiers (1010b for memory, 1011b for ID page).
The device integrates a power-on reset (POR) circuit that prevents spurious writes during voltage ramp-up, and features hardware-based write protection via the WC pin - when driven high, it disables all write operations while still acknowledging device select and address bytes. Chip enable inputs (E2–E0) are internally pulled low in UFDFPN5 packages, fixing the device address to 1010000b.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 32 Kbit (4 K × 8), enabling storage of firmware calibration data, serial numbers, or system configuration tables |
| I²C speed modes | Supports 100 kHz (standard), 400 kHz (fast), and 1 MHz (fast mode plus) - compatible with legacy and high-throughput microcontroller hosts |
| Page size | 32 bytes per page - defines maximum atomic write burst length and influences buffer sizing in host firmware |
| Write cycle time | ≤5 ms (byte/page), typical 3.2 ms - determines minimum inter-write delay and impacts real-time logging latency |
| Endurance | 4 million write cycles - ensures >10 years of daily 1,000-write operation in field-deployed equipment |
| Data retention | 200 years at +25 °C - guarantees long-term integrity of stored calibration or security keys without refresh |
| Supply voltage range | 1.7 V to 5.5 V - supports direct interfacing with 1.8 V, 3.3 V, and 5 V logic domains without level shifters |
| Operating temperature | –40 °C to +85 °C - qualified for industrial-grade operation in motor drives, PLCs, and outdoor IoT gateways |
Pinout & Package
Package: UFDFPN8 (MC), DFN8 2 × 3 mm, ECOPACK2-compliant, unsawn wafer tested. Pinout validated per DS0952 Rev 33 Figure 3 (UFDFPN5) and Figure 2 (8-pin SO/TSSOP); M24C32-FMC6TG uses UFDFPN8 pin mapping aligned with SO8N functional assignment.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: SDA | Serial Data I/O | Open-drain bidirectional bus line; requires external pull-up; shares bus with other I²C targets |
| 2: SCL | Serial Clock Input | Master-generated clock; timing governs data setup/hold and ACK sampling windows |
| 3: WC | Write Control Input | Active-high hardware lock: disables all writes to memory array while preserving read functionality |
| 4: VCC | Supply Voltage | 1.7–5.5 V DC input; decoupling capacitor (10–100 nF) required near pins for noise immunity |
| 5: VSS | Ground Reference | Return path for VCC; must be low-impedance connection to minimize ground bounce during write cycles |
| 6: E0 | Chip Enable LSB | In UFDFPN8, tied internally low; sets device address bit b1 = 0 in 7-bit I²C select code (1010xxx) |
| 7: E1 | Chip Enable MSB | In UFDFPN8, tied internally low; sets device address bit b2 = 0 in 7-bit I²C select code (1010xxx) |
| 8: E2 | Chip Enable MSB+1 | In UFDFPN8, tied internally low; sets device address bit b3 = 0 in 7-bit I²C select code (1010xxx) |
Key Features
| Feature | Design Value |
|---|---|
| Hardware write protection | WC pin disables all writes to entire memory array - eliminates need for software-level lock bits or command sequences |
| Identification page (M24C32-DF only) | 32-byte dedicated page for storing immutable parameters (e.g., MAC address, production date); can be permanently locked to read-only |
| Enhanced reliability | 4 million write cycles and 200-year data retention - reduces field failure risk in unattended systems like smart meters |
| I²C bus flexibility | 1 MHz Fast Mode Plus support - enables faster configuration loading in high-speed MCU applications without bus arbitration overhead |
| Low-voltage operation | 1.7 V minimum VCC - allows direct integration with battery-backed or energy-harvesting subsystems |
| ECOPACK2 packaging | RoHS-compliant, halogen-free UFDFPN8 - meets environmental compliance requirements for global industrial shipments |
Applications
| Industrial Sensor Calibration | Power Supply Configuration |
|---|---|
|
Use Scenario: Storing factory-calibrated gain/offset coefficients and temperature compensation tables in pressure or current sensors. IC Role / Device Role / Timing Role: Nonvolatile parameter storage accessed at boot and during field recalibration; no timing-critical interface beyond I²C clock rate. Use Value: Enables plug-and-play sensor replacement without host reprogramming; 200-year retention ensures calibration validity over product lifetime. |
Use Scenario: Holding output voltage/current setpoints, protection thresholds, and startup sequencing delays in digitally controlled DC-DC modules. IC Role / Device Role / Timing Role: Persistent configuration store updated only during manufacturing or service; accessed once per power-on reset. Use Value: Eliminates manual potentiometer adjustment; 1.7 V operation allows retention during brown-out conditions before main rail stabilizes. |
| Embedded Controller Bootloader Settings | IoT Edge Device Identity Storage |
|
Use Scenario: Saving bootloader jump addresses, firmware version flags, and secure boot keys in microcontroller-based edge controllers. IC Role / Device Role / Timing Role: Secure, tamper-resistant configuration storage; WC pin prevents accidental corruption during firmware updates. Use Value: Hardware-level write lock complements software security layers; 4 million endurance supports frequent field firmware upgrades. |
Use Scenario: Storing unique device identifiers (e.g., IEEE EUI-48), TLS certificate fingerprints, and provisioning tokens in cellular/NB-IoT modems. IC Role / Device Role / Timing Role: Immutable identity anchor; accessed during TLS handshake and device onboarding; no runtime writes after provisioning. Use Value: Prevents cloning attacks via physical EEPROM readout; identification page lock (in DF variant) ensures cryptographic material remains read-only. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C32D-SSHM-T (Microchip) | Same 32 Kbit capacity, 1.7–5.5 V, but lacks WC pin and identification page; max I²C speed 1 MHz only in 2.5–5.5 V range | No hardware write lock - requires software-managed protection; no dedicated ID page for secure parameters | Select when cost sensitivity outweighs need for hardware write disable or secure ID storage |
| BR24G32FJ-3GE2 (ROHM) | 32 Kbit, 1.6–5.5 V, includes WP pin (functionally identical to WC), but rated only to +105 °C and lacks identification page | Higher temp rating suits automotive under-hood use; no ID page limits secure provisioning capability | Prefer for extended temperature environments where ID page is not required |
Compared with AT24C32D and BR24G32FJ, M24C32-FMC6TG uniquely combines hardware write protection, wide voltage operation down to 1.7 V, and - in DF variants - a lockable identification page, making it optimal for industrial systems demanding both robustness and secure parameter management.
Availability
M24C32-FMC6TG is available at Aetrix Electronics and suitable for industrial sensor calibration, power supply configuration, embedded controller bootloader settings, and IoT edge device identity storage requiring stable component supply across extended temperature and voltage ranges.
Supply support for M24C32-FMC6TG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in microcontrollers, power management, MEMS, and analog/mixed-signal ICs for industrial, automotive, and consumer markets.
M24C32-FMC6TG belongs to ST's serial EEPROM product line, engineered for high-reliability, low-power, and space-constrained applications where deterministic nonvolatile storage and hardware-level data protection are essential.
FAQ
What I²C bus speeds does M24C32-FMC6TG support, and how does voltage affect them?
M24C32-FMC6TG supports Standard Mode (100 kHz), Fast Mode (400 kHz), and Fast Mode Plus (1 MHz) across its full 1.7–5.5 V supply range. Unlike some competitors, it maintains 1 MHz capability even at 1.7 V, eliminating need for voltage-dependent speed negotiation in mixed-rail systems.
How does the WC (Write Control) pin function, and what happens when it is left floating?
WC is active-high: driving it high disables all write operations to the memory array while still allowing reads and device address acknowledgment. When left floating, WC is internally pulled low, enabling normal write functionality - no external pull-down is required for default operation.
Is the identification page available on M24C32-FMC6TG, and how is it accessed?
No - the identification page is exclusive to the M24C32-DF variant (e.g., M24C32-DFMC6TG). M24C32-FMC6TG is the standard F-version without this feature. Access requires distinct device type identifier (1011b) and specific address bit patterns, as defined in DS0952 Section 5.1.3.
What package type is M24C32-FMC6TG, and are pinouts compatible with SO8N footprints?
M24C32-FMC6TG uses UFDFPN8 (2 × 3 mm, 0.5 mm pitch), not SO8N. While signal functions match (SDA/SCL/WC/VCC/VSS/E0–E2), the physical layout differs: UFDFPN8 has pins on two sides with exposed thermal pad, whereas SO8N has gull-wing leads. PCB layout must follow MC (UFDFPN8) footprint, not MN (SO8N).
M24C32-FMC6TG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-UFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 32Kbit
- Memory Organization:
- 4K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 450 ns
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-UFDFPN (2x3)
M24C32-FMC6TG FAQ
1.How can I place an order for M24C32-FMC6TG through Aetrix?
Please submit a Request for Quotation (RFQ) for M24C32-FMC6TG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M24C32-FMC6TG reliable?
The price and inventory of M24C32-FMC6TG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M24C32-FMC6TG is usually 5 days.
3.What payment methods are accepted for M24C32-FMC6TG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M24C32-FMC6TG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M24C32-FMC6TG?
M24C32-FMC6TG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M24C32-FMC6TG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M24C32-FMC6TG?
For technical support, including M24C32-FMC6TG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M24C32-FMC6TG requirements.
6.How does Aetrix verify that M24C32-FMC6TG is sourced from the original manufacturer or authorized distributors?
All M24C32-FMC6TG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M24C32-FMC6TG meets industry standards.
7.What is the process for return or replacement of M24C32-FMC6TG?
All M24C32-FMC6TG units undergo pre-shipment inspection (PSI). If there is an issue with M24C32-FMC6TG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M24C32-FMC6TG part is unused and in its original packaging.
Return procedure for M24C32-FMC6TG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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