STMicroelectronics M48T35Y-70MH6F
- Part No.:
- M48T35Y-70MH6F
- Manufacturer:
- STMicroelectronics
- Category:
- Real Time Clocks
- Package:
- 28-SOP (0.350", 8.89mm Width) with SNAPHAT Sockets
- Datasheet:
-
M48T35Y-70MH6F.pdf
- Description:
- IC RTC CLK/CALENDAR PAR 28SOH
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
M48T35Y-70MH6F from STMicroelectronics is a 5 V, 256 Kbit (32 Kb × 8) non-volatile TIMEKEEPER® SRAM integrating ultra-low-power static RAM, real-time clock (RTC), power-fail control circuitry, and on-board lithium battery + 32.768 kHz quartz crystal in a CAPHAT™ DIP-28 package. It delivers BCD-coded timekeeping (year/month/day/hour/minute/second), automatic leap-year correction, and BYTEWIDE™ RAM-like access to clock registers at addresses 7FF8h–7FFFh for embedded systems requiring persistent time and data retention during main power loss.
For engineers reviewing the M48T35Y-70MH6F datasheet, M48T35Y-70MH6F pinout, M48T35Y-70MH6F application, or M48T35Y-70MH6F equivalent, this device serves as a JEDEC-standard 32 Kb × 8 SRAM drop-in replacement with integrated RTC functionality - critical for industrial controllers, medical instruments, and legacy system upgrades where board space, battery lifetime (>7 years), and deterministic power-fail write protection are design constraints.
Technical Context
The M48T35Y-70MH6F integrates a BiPORT™ SRAM array and a temperature-compensated 32.768 kHz crystal oscillator on a single die, with clock registers mapped into upper memory addresses (7FF8h–7FFFh) and updated once per second by dedicated hardware. Its VPFD window (4.2 V ≤ VPFD ≤ 4.5 V) triggers automatic write protection and high-Z outputs before VCC drops below VSO (battery switchover voltage), ensuring data integrity during brownout.
Calibration is implemented via five programmable bits (D4–D0) in the control register (7FF8h), enabling ±1/–2 ppm accuracy at 25 °C by adding/subtracting counts at the divide-by-256 stage - eliminating external trim capacitors. The STOP bit (MSB of seconds register) halts oscillator operation to conserve battery during shelf storage, and the century bit (CB) supports year-2100 rollover when enabled via CEB.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 32 Kb × 8 = 256 Kbit SRAM with BYTEWIDE™ access; directly replaces JEDEC-standard 32 Kb × 8 SRAMs in existing sockets. |
| RTC Accuracy | ±1/–2 ppm at 25 °C after calibration; enables <±1 sec/month drift without external compensation components. |
| Power-Fail Threshold | VPFD range: 4.2 V to 4.5 V; initiates automatic WRITE protect and high-Z I/O before VCC falls below VSO (~3.0 V), preventing corruption during undervoltage. |
| Battery Backup Life | ≥7 years cumulative data/clock retention on internal 48 mAh lithium cell; eliminates need for field battery replacement in sealed systems. |
| Access Time | 70 ns READ/WRITE cycle time; meets timing requirements of 8-bit microcontrollers and legacy bus interfaces operating up to 14 MHz. |
| Operating Temp | –40 °C to +85 °C; validated across industrial temperature range with full RTC and SRAM functionality. |
| Crystal Integration | On-board 32.768 kHz quartz crystal in CAPHAT™ DIP-28 package; removes layout sensitivity, EMI risk, and external component count. |
Pinout & Package
Package: 28-pin plastic DIP (PCDIP28), 600 mil width, with integrated CAPHAT™ housing containing lithium battery and 32.768 kHz crystal. No external battery or crystal required.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address Inputs | 15-bit address bus supporting full 32 Kb memory map; compatible with standard 8-bit microcontroller address lines. |
| DQ0–DQ7 | Data I/O | 8-bit bidirectional data bus; shares same pins for SRAM data and RTC register reads/writes (BYTEWIDE™ access). |
| E | Chip Enable | Active-low chip select; controls SRAM/RTC register access and enables power-fail detection logic when asserted. |
| G | Output Enable | Active-low output enable; isolates DQ bus during WRITE cycles or standby to prevent bus contention. |
| W | WRITE Enable | Active-low WRITE strobe; determines WRITE mode timing with E; must be held high during READ operations. |
| VCC | Supply Voltage | 5 V nominal (4.5–5.5 V range); powers SRAM and RTC; VPFD monitoring occurs on this rail to trigger backup switchover. |
| VSS | Ground | System ground reference for all digital and analog functions including crystal oscillator and voltage sense circuitry. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated CAPHAT™ Package | Single-component solution with battery, crystal, and IC in DIP-28; eliminates PCB footprint for discrete RTC + backup power and reduces BOM count by ≥4 parts. |
| Byte-Mapped RTC Registers | Clock data (BCD year/month/day/hour/minute/second) resides in SRAM addresses 7FF8h–7FFFh; accessed using standard memory read/write instructions - no special protocol or I²C/SPI interface needed. |
| Automatic Leap-Year Correction | Hardware-level correction for 28/29/30/31-day months applied continuously; no firmware intervention required for calendar accuracy through year 2100. |
| Programmable Oscillator Calibration | Five-bit calibration register (D4–D0) adjusts timing at divide-by-256 stage; achieves ±1/–2 ppm accuracy without external capacitors or factory trimming. |
| Century Bit Support | CEB/CB bits in day register (7FFCh) enable correct year-2100 rollover; CB toggles automatically at century boundary when CEB = 1. |
Applications
| Industrial PLCs | Medical Diagnostic Devices |
|---|---|
|
Use Scenario: Programmable logic controllers maintaining uptime logs, event timestamps, and configuration checksums across AC power interruptions. IC Role / Device Role / Timing Role: Non-volatile time source and data buffer; provides synchronized timestamping and retains critical runtime parameters during brownouts. Use Value: Eliminates need for external RTC + EEPROM + backup capacitor network, reducing failure points and enabling >7-year unattended operation. |
Use Scenario: Portable ultrasound or ECG units requiring accurate patient session timestamps, audit trails, and firmware update validation with date-based certificates. IC Role / Device Role / Timing Role: Primary timekeeper and secure parameter store; supplies BCD-formatted time to host MCU and preserves calibration data during battery swaps. Use Value: On-chip battery ensures timestamp continuity during hot-swap battery changes; century-bit support guarantees compliance with HIPAA-mandated long-term record retention. |
| Legacy System Upgrades | Energy Metering Hardware |
|
Use Scenario: Retrofitting aging vending machines or point-of-sale terminals with battery-backed timekeeping without redesigning PCB layout or socket footprint. IC Role / Device Role / Timing Role: Pin- and function-compatible JEDEC 32 Kb × 8 SRAM replacement; adds RTC capability transparently to existing 8-bit bus architecture. Use Value: Enables time-stamped transaction logging and firmware scheduling using identical address/data/control signals - zero software modification required. |
Use Scenario: Smart electricity meters recording kWh consumption with precise time-of-use intervals and tamper-detection timestamps. IC Role / Device Role / Timing Role: High-reliability time base and secure metering parameter storage; maintains accurate billing intervals even during grid instability or intentional power cycling. Use Value: VPFD-triggered write protection prevents meter register corruption during voltage sags; 7-year battery life exceeds utility deployment cycles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar non-volatile RTC+SRAM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS12887A-70IND+ | Discrete lithium battery (external), no integrated crystal; requires external 32.768 kHz crystal and load capacitors; 200 ns access time. | Larger PCB footprint due to external components; less robust against vibration/shock-induced crystal failure. | Select if legacy DS12887 firmware compatibility is mandatory and board space allows external crystal/battery layout. |
| M48T59Y-70MH6F | Higher density: 512 Kbit (64 Kb × 8); identical CAPHAT™ DIP-28 package; same VPFD (4.2–4.5 V) and calibration architecture. | Supports larger firmware tables or extended log buffers; pin-compatible but not byte-addressable identical - requires address decoding adjustment. | Select when additional non-volatile memory is needed alongside RTC, and existing socket supports 64 Kb addressing. |
Compared with DS12887A-70IND+, M48T35Y-70MH6F reduces component count and improves shock tolerance via integrated crystal; compared with M48T59Y-70MH6F, it offers optimal cost/performance balance for 32 Kb memory requirements without over-provisioning.
Availability
M48T35Y-70MH6F is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostic devices, legacy system upgrades, and energy metering hardware requiring stable component supply, long-term lifecycle support, and guaranteed battery-backed timekeeping performance.
Supply support for M48T35Y-70MH6F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, microcontroller, power, and sensor solutions for industrial, automotive, and consumer markets.
M48T35Y-70MH6F belongs to ST's TIMEKEEPER® family - engineered specifically for embedded systems needing monolithic, battery-backed RTC+SRAM integration with JEDEC compatibility and industrial temperature resilience.
FAQ
Does M48T35Y-70MH6F require external crystal or battery?
No. The CAPHAT™ DIP-28 package integrates a 32.768 kHz quartz crystal and a 48 mAh lithium button cell internally. No external crystal, load capacitors, or backup battery is needed - the device operates as a complete, self-contained timekeeping and memory solution upon VCC application.
How is the century rollover handled in year 2100?
The M48T35Y-70MH6F implements century rollover via the Century Enable Bit (CEB) and Century Bit (CB) in register 7FFCh. When CEB = 1, CB toggles automatically at the turn of the century (e.g., 2099 → 2100), ensuring correct BCD year representation beyond 2099 without firmware updates or manual intervention.
What happens during a power failure while writing to SRAM?
If VCC drops into the VPFD window (4.2–4.5 V), the device immediately enters power-fail mode: all outputs go high-Z, inputs are ignored, and WRITE is disabled. Data at the currently addressed location may be corrupted, but all other SRAM contents and RTC registers remain intact and protected.
Can the internal oscillator be stopped to extend battery life?
Yes. The STOP bit (MSB of the seconds register at 7FFFh) halts the 32.768 kHz oscillator. This reduces battery current draw during shelf storage or idle periods. The oscillator resumes within 1 second after clearing the STOP bit, and the RTC continues counting from its last known state.
M48T35Y-70MH6F Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- Timekeeper®
- Package/Case:
- 28-SOP (0.350", 8.89mm Width) with SNAPHAT Sockets
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Clock/Calendar
- Features:
- Leap Year
- Memory Size:
- -
- Time Format:
- HH:MM:SS (24 hr)
- Date Format:
- YY-MM-DD-dd
- Interface:
- Parallel
- Voltage - Supply:
- 4.5V ~ 5.5V
- Voltage - Supply, Battery:
- -
- Current - Timekeeping (Max):
- 2mA @ 4.75V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 28-SOH
M48T35Y-70MH6F FAQ
1.How can I place an order for M48T35Y-70MH6F through Aetrix?
Please submit a Request for Quotation (RFQ) for M48T35Y-70MH6F on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M48T35Y-70MH6F reliable?
The price and inventory of M48T35Y-70MH6F are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M48T35Y-70MH6F is usually 5 days.
3.What payment methods are accepted for M48T35Y-70MH6F?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M48T35Y-70MH6F transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M48T35Y-70MH6F?
M48T35Y-70MH6F orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M48T35Y-70MH6F order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M48T35Y-70MH6F?
For technical support, including M48T35Y-70MH6F datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M48T35Y-70MH6F requirements.
6.How does Aetrix verify that M48T35Y-70MH6F is sourced from the original manufacturer or authorized distributors?
All M48T35Y-70MH6F products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M48T35Y-70MH6F meets industry standards.
7.What is the process for return or replacement of M48T35Y-70MH6F?
All M48T35Y-70MH6F units undergo pre-shipment inspection (PSI). If there is an issue with M48T35Y-70MH6F, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M48T35Y-70MH6F part is unused and in its original packaging.
Return procedure for M48T35Y-70MH6F:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
M48T35Y-70MH6F Tags

-
MCP7940N-I/SN
Microchip Technology

-
MCP7940MT-I/MNY
Microchip Technology

-
PCF85063ATL/1,118
NXP USA Inc.

-
MCP7940NT-I/SN
Microchip Technology

-
MCP7940NT-I/MS
Microchip Technology

-
MCP7940N-I/MS
Microchip Technology

-
PCF85063AT/AY
NXP USA Inc.
-
PCF85063TP/1Z
NXP Semiconductors

-
PCF85063ATT/AJ
NXP USA Inc.

-
MCP7940NT-E/SN
Microchip Technology

-
MCP7940NT-I/MNY
Microchip Technology

-
MCP79400T-I/SN
Microchip Technology
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