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STMicroelectronics M48T86PC1

Part No.:
M48T86PC1
Manufacturer:
STMicroelectronics
Category:
Real Time Clocks
Package:
24-DIP Module (0.600", 15.24mm)
Datasheet:
AetrixM48T86PC1.pdf
Description:
IC RTC CLK/CALENDAR PAR 24-DIP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:2,005

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Product details

Overview

M48T86PC1 from STMicroelectronics is a 5.0 V real-time clock (RTC) with integrated lithium battery and 32.768 kHz crystal in CAPHAT™ DIP-24 package, providing non-volatile timekeeping, 114 bytes of battery-backed RAM, and three software-maskable interrupts (alarm, periodic, update-ended). It serves as a drop-in replacement for legacy PC clock/calendar subsystems requiring leap-year compensation and ±1 minute/month accuracy.

For engineers reviewing the M48T86PC1 datasheet, M48T86PC1 pinout, M48T86PC1 application, or M48T86PC1 equivalent, key selection criteria include Intel/Motorola bus timing selectability, SQW output programmability (13 selectable frequencies), IRQ open-drain interrupt behavior, RCL-controlled RAM clear function, and CAPHAT™ self-contained power/crystal integration.

Technical Context

The M48T86PC1 implements a BCD-encoded timekeeping engine driven by an internal 32.768 kHz quartz oscillator with ≤23 ppm error at 25°C, enabling ±1 minute/month accuracy. Its dual-bus interface supports Intel-style (AS/DS strobes) and Motorola-style (E/R/W) timing via MOT pin configuration, and all register accesses occur through an 8-bit multiplexed AD0–AD7 bus.

Interrupt generation is fully software-controlled via Register B enable bits (PIE/AIE/UIE) and flagged in Register C (PF/AF/UF/IRQF); IRQ is open-drain and cleared on Register C read. The device features automatic power-fail detection with VPFD-triggered deselection and 200 ms power-up stabilization delay to ensure clock integrity during supply transitions.

Key Specifications

ParameterValue and Actual Design Meaning
Supply Voltage5.0 V nominal; operates only within 4.5–5.5 V range; disables access below VPFD (~4.25 V) to protect RAM and clock state.
Clock Accuracy±1 minute per month (≤23 ppm oscillator error at 25°C); includes automatic leap-year compensation through year 2100.
RAM Capacity128 bytes total: 14 bytes dedicated to clock/control registers + 114 bytes general-purpose non-volatile static RAM.
Interrupt TypesThree independent, software-maskable interrupts: time-of-day alarm (1 s–1 day), periodic (122 µs–500 ms), and update-ended cycle notification.
Square Wave Output13 programmable frequencies (32.768 kHz down to 1 Hz) via Register A; enabled/disabled by SQWE bit in Register B.
Bus InterfaceSelectable Intel (AS/DS) or Motorola (E/R/W) timing via MOT pin; 8-bit multiplexed AD0–AD7 address/data bus.
Package TypePCDIP24 (24-pin plastic DIP) with integrated CAPHAT™ housing containing lithium battery and crystal - no external components required.

Pinout & Package

Package: PCDIP24 (24-pin plastic dual in-line package) with integrated CAPHAT™ battery and crystal module - self-contained, no external backup power or timing source needed.

Pin/TerminalCircuit RoleDesign Meaning
VCCPrimary power supply input5.0 V main supply; triggers automatic write protection and RAM retention when voltage drops below VPFD (~4.25 V).
VSSGround referenceSystem ground return; required for stable oscillator operation and logic level referencing.
AD0–AD7Multiplexed address/data bus8-bit bidirectional bus carrying both address (latched on AS falling edge) and data (transferred on DS or R/W edges).
EChip enable inputActive-low signal enabling bus cycles; address latching occurs even if E is inactive, but no data transfer takes place.
R/WRead/write controlHigh = read mode (data driven onto AD0–AD7 during DS low); low = write mode (data sampled on R/W falling edge).
ASAddress strobe inputFalling edge latches address from AD0–AD7 into internal address decoder; defines start of bus cycle in Intel timing mode.
DSData strobe inputFalling edge enables data output during read; functions as RD signal in Intel timing mode.
IRQInterrupt request outputOpen-drain output asserting low when enabled interrupt condition is active; cleared automatically on Register C read.
RSTReset inputActive-low reset that clears all interrupt enable/flag bits, disables SQW, and blocks access until released high.
RCLRAM clear inputHeld low ≥100 ms with oscillator running clears all 114 RAM bytes to 0xFF; does not affect clock registers or battery load.
SQWSquare wave outputProgrammable frequency output (13 taps); disabled when VCC < VPFD or SQWE bit = 0; requires external pull-up.
MOTBus mode selectConnected to VCC = Motorola timing (E/R/W); connected to VSS or floating = Intel timing (AS/DS); internal 20 kΩ pull-down.
NCNo connectPins 9, 12, 13, 14, 21, 22 are internally unconnected - must remain unconnected in PCB layout.

Key Features

FeatureDesign Value
CAPHAT™ Integrated PowerSelf-contained 24-pin DIP package with embedded lithium battery and 32.768 kHz crystal - eliminates external backup components and layout complexity.
Software-Maskable InterruptsThree independent interrupt sources (alarm, periodic, update-ended) each controlled by dedicated enable/flag bits in Registers B and C - enables precise event-driven system wake-up without polling.
Selectably Timed Bus InterfaceMOT pin selects Intel (AS/DS) or Motorola (E/R/W) timing - allows direct compatibility with legacy x86 and 68k-based designs without glue logic.
Non-Volatile RAM Retention114 bytes of battery-backed SRAM retain data for ≥10 years without VCC - usable for BIOS settings, calibration data, or firmware state storage across power cycles.
Programmable Square Wave Output13 discrete SQW frequencies (32.768 kHz to 1 Hz) selected via Register A bits OSC0–OSC2 - supports system clock derivation, LED blinking, or watchdog timing without external dividers.

Applications

Legacy PC Motherboard ClockIndustrial HMI Time Stamping

Use Scenario: Replacing obsolete DS12887 or bq3285/7A in AT/ATX motherboard designs requiring BIOS RTC functionality.

IC Role / Device Role / Timing Role: Primary real-time clock/calendar with battery-backed RAM storing CMOS setup values and system uptime.

Use Value: Pin- and function-compatible drop-in replacement with identical register map and Intel bus timing - zero firmware or layout changes required.

Use Scenario: Adding timestamping capability to human-machine interface panels in factory automation systems with intermittent power.

IC Role / Device Role / Timing Role: Standalone time-of-day source synchronizing log entries and operator actions across distributed PLC nodes.

Use Value: 10-year data retention ensures accurate timestamps persist through extended maintenance outages or brownouts without external supercapacitors.

Medical Device Power-Fail LoggingEmbedded Telematics Event Recorder

Use Scenario: Capturing critical power-loss events in portable diagnostic equipment where mains failure must be logged with precise time/date.

IC Role / Device Role / Timing Role: Fault-tolerant RTC generating alarm interrupt on VCC dropout to trigger immediate non-volatile save of operational state.

Use Value: Automatic VPFD-triggered deselection prevents corrupted writes during brownout, while IRQ assertion guarantees immediate CPU attention before backup power depletes.

Use Scenario: Recording ignition-on/off cycles and GPS-tracked vehicle motion events in fleet management black boxes.

IC Role / Device Role / Timing Role: Tamper-resistant time source anchoring event logs with calendar-accurate timestamps independent of host processor uptime.

Use Value: Leap-year compensated calendar valid through 2100 ensures long-term deployment without date rollover errors in unattended field units.

Equivalent & Alternatives

The following parts are listed as comparable options for similar real-time clock applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
DS12887Same 24-pin DIP footprint and register-level compatibility; uses external battery and crystal; no integrated CAPHAT™ housing.Requires separate battery holder and crystal layout; higher BOM count and board area; lacks built-in VPFD protection circuitry.Choose only if CAPHAT™ integration is unnecessary and legacy board reuse mandates exact mechanical fit without redesign.
bq3287Pin-compatible but uses I²C interface instead of parallel bus; no AD0–AD7, AS, DS, or MOT pins; different register map and interrupt handling.Requires firmware rewrite for I²C communication; incompatible with Intel/Motorola bus timing; no RCL pin for hardware RAM clear.Consider only for new designs targeting lower pin count and simplified routing - not a drop-in replacement for M48T86PC1.

Compared with DS12887 and bq3287, the M48T86PC1 uniquely delivers full self-containment (battery + crystal), parallel bus flexibility, and hardware RCL-initiated RAM clearing - making it the sole option for legacy PC-compatible designs needing guaranteed mechanical and functional equivalence without layout or firmware modification.

Availability

M48T86PC1 is available at Aetrix Electronics and suitable for legacy PC motherboard refurbishment, industrial HMI time stamping, and medical device power-fail logging requiring stable component supply and long-term lifecycle support.

Supply support for M48T86PC1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, analog ICs, MEMS, and power management solutions for industrial, automotive, and consumer markets.

The M48T86 belongs to ST's legacy real-time clock product line, engineered specifically for backward-compatible PC and embedded system timekeeping with integrated power and timing - prioritizing drop-in replaceability and long-term reliability over feature expansion.

FAQ

What is the function of the RCL pin on M48T86PC1?

The RCL (RAM Clear) pin performs a hardware-initiated erase of the 114-byte general-purpose RAM section, setting all locations to 0xFF. It requires being held low for at least 100 ms while the oscillator is running and VCC is applied. This operation does not affect clock registers, battery load, or oscillator stability, and is used for secure data wipe during system initialization or service procedures.

Does M48T86PC1 support both Intel and Motorola bus protocols?

Yes - the MOT pin selects bus timing mode: tied to VSS (or left floating, due to internal 20 kΩ pull-down) enables Intel-style timing using AS and DS strobes; tied to VCC enables Motorola-style timing using E and R/W signals. Both modes share the same AD0–AD7 multiplexed bus and register interface, ensuring compatibility with legacy x86 and 68k-based platforms without firmware changes.

How does the M48T86PC1 maintain time during main power loss?

Upon VCC dropping below the power-fail deselect threshold (VPFD ≈ 4.25 V), the device automatically disables write access and switches to battery-backed operation using the integrated lithium cell in the CAPHAT™ package. The 32.768 kHz crystal continues driving the RTC, preserving time/date and RAM contents for ≥10 years without external power - no external components or user intervention required.

Can the SQW output be disabled independently of the RTC function?

Yes - the square wave output is controlled solely by the SQWE (Square Wave Enable) bit in Register B (bit 3). Setting SQWE = 0 disables SQW regardless of oscillator status or VCC level (as long as VCC > VPFD), while SQWE = 1 enables output at the frequency selected by OSC0–OSC2 bits in Register A. The RTC continues normal timekeeping and interrupt generation even when SQW is disabled.

M48T86PC1 Specifications

Product attributes
Attribute value
Manufacturer:
STMicroelectronics
Series:
-
Package/Case:
24-DIP Module (0.600", 15.24mm)
Packaging:
Tube
Product Status:
Obsolete
Programmable:
Not Verified
Type:
Clock/Calendar
Features:
Alarm, Leap Year, NVSRAM, Square Wave Output
Memory Size:
114B
Time Format:
HH:MM:SS (12/24 hr)
Date Format:
YY-MM-DD-dd
Interface:
Parallel
Voltage - Supply:
4.5V ~ 5.5V
Voltage - Supply, Battery:
-
Current - Timekeeping (Max):
15mA @ 4.5V ~ 5.5V
Operating Temperature:
0°C ~ 70°C
Mounting Type:
Through Hole
Grade:
-
Qualification:
-
Supplier Device Package:
24-PCDIP, CAPHAT®

M48T86PC1 FAQ

1.How can I place an order for M48T86PC1 through Aetrix?

Please submit a Request for Quotation (RFQ) for M48T86PC1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for M48T86PC1 reliable?

The price and inventory of M48T86PC1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M48T86PC1 is usually 5 days.

3.What payment methods are accepted for M48T86PC1?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M48T86PC1 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for M48T86PC1?

M48T86PC1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your M48T86PC1 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for M48T86PC1?

For technical support, including M48T86PC1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M48T86PC1 requirements.

6.How does Aetrix verify that M48T86PC1 is sourced from the original manufacturer or authorized distributors?

All M48T86PC1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M48T86PC1 meets industry standards.

7.What is the process for return or replacement of M48T86PC1?

All M48T86PC1 units undergo pre-shipment inspection (PSI). If there is an issue with M48T86PC1, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The M48T86PC1 part is unused and in its original packaging.

Return procedure for M48T86PC1:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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