STMicroelectronics M74HC73B1R
- Part No.:
- M74HC73B1R
- Manufacturer:
- STMicroelectronics
- Category:
- Flip Flops
- Package:
- 14-DIP (0.300", 7.62mm)
- Datasheet:
-
M74HC73B1R.pdf
- Description:
- IC FF JK TYPE DUAL 1BIT 14DIP
- Quantity:
- Payment:

- Shipping:

Inventory:3,676
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Product details
Overview
M74HC73B1R from STMicroelectronics is a high-speed CMOS dual J-K flip-flop with asynchronous clear, fabricated in silicon gate C2MOS technology. It operates across 2V–6V supply, delivers 80MHz max clock frequency (typ.) at 6V, and features symmetrical 4mA output drive, balanced tPLH/tPHL propagation delays, and 2µA max ICC at 25°C. Used in synchronous logic control, state machines, and clock division circuits in industrial PLC I/O modules.
For engineers reviewing the M74HC73B1R datasheet, M74HC73B1R pinout, M74HC73B1R application, or M74HC73B1R equivalent, key selection criteria include guaranteed operation from –55°C to +125°C, dual independent J-K sections with separate clock and clear inputs, and DIP-14 package compatibility with legacy 74-series board layouts.
Technical Context
The M74HC73B1R implements two independent negative-edge-triggered J-K flip-flops, each with asynchronous active-low clear (CLR) that overrides clock and J/K states. Its C2MOS process enables rail-to-rail input voltage tolerance (–0.5V to VCC+0.5V) and high noise immunity (28% VCC min. VIH/VIL hysteresis).
Each flip-flop supports toggle, set, reset, and hold functions per standard J-K truth table; propagation delays are tightly matched (tPLH ≅ tPHL), and minimum pulse widths for CK and CLR are specified down to 6ns at 6V, supporting reliable timing in multi-stage sequential logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2V to 6V - Enables direct interface with 3.3V and 5V logic systems without level shifters. |
| fMAX | 80 MHz (typ. at VCC = 6V) - Supports high-speed counter and register applications up to 80 MHz clock rate. |
| IOL/IOH | ±4 mA (min.) - Drives standard TTL loads and multiple 74HC inputs without fanout limitation. |
| tPLH / tPHL | 12 ns / 13 ns (typ. at VCC = 6V) - Ensures predictable, balanced edge-to-output timing for deterministic state transitions. |
| ICC (Quiescent) | 2 µA (max. at TA = 25°C) - Enables ultra-low-power operation in battery-backed or energy-constrained control logic. |
| Operating Temp | –55°C to +125°C - Qualified for extended-temperature industrial and automotive under-hood environments. |
| VIH/VIL | 4.2V / 1.8V (min. at VCC = 6V) - Provides 28% VCC noise margin, rejecting transient coupling on shared PCB traces. |
Pinout & Package
Package: Plastic DIP-14 (dual in-line package, 0.3" wide, through-hole mounting). Pin pitch: 2.54 mm. RoHS-compliant, Pb-free lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 5 | 1CK, 2CK | Negative-edge clock inputs - Trigger state change only on falling edge; asynchronous clear takes priority. |
| 2, 6 | 1CLR, 2CLR | Active-low asynchronous reset - Forces Q = L and Q̅ = H independently of clock or J/K state. |
| 12, 9 | 1Q, 2Q | True outputs - Provide registered logic state; fanout up to 10 74HC loads at 6V. |
| 13, 8 | 1Q̅, 2Q̅ | Complement outputs - Enable direct implementation of toggle or T-type behavior without external inverters. |
| 14, 7, 3, 10 | 1J, 2J, 1K, 2K | Synchronous data inputs - Determine next-state logic (set, reset, toggle, hold) on next clock edge. |
| 11 | GND | Ground reference - Must be low-impedance connection; decoupling capacitor required near VCC pin. |
| 4 | VCC | Positive supply - Requires 100nF ceramic decoupling capacitor placed ≤5 mm from pin. |
Key Features
| Feature | Design Value |
|---|---|
| Pin-compatible with 74LS73 | Direct drop-in replacement for legacy TTL-based J-K flip-flop designs without layout change. |
| High noise immunity | 28% VCC minimum hysteresis ensures robust operation in electrically noisy industrial control cabinets. |
| Wide VCC range | 2V–6V operation allows single-supply use across mixed-voltage systems (e.g., 3.3V MCU + 5V peripheral logic). |
| Balanced propagation delays | tPLH ≅ tPHL minimizes skew between rising/falling output edges - critical for glitch-free clock division. |
| ESD-protected inputs | Integrated protection circuits withstand ±2kV HBM, reducing need for external TVS diodes in field-deployed equipment. |
Applications
| Industrial Counter Modules | Programmable Logic Controller (PLC) I/O Expansion |
|---|---|
Use Scenario: Counting encoder pulses in motor feedback loops within DIN-rail mounted automation controllers. IC Role / Device Role / Timing Role: Dual J-K flip-flop used as synchronous 2-bit binary counter; one section divides clock by 2, second by 2 again for /4 output. Use Value: Guaranteed –55°C to +125°C operation ensures reliability in uncooled control cabinets; low ICC extends uptime in battery-buffered backup modes. | Use Scenario: Expanding discrete input scanning capability in modular PLC backplanes with isolated 24V DC inputs. IC Role / Device Role / Timing Role: Edge-triggered sampling latch for synchronized capture of 24V sensor signals via optocoupler interfaces. Use Value: Asynchronous clear enables immediate reset of latched states during system fault recovery; 4mA drive directly drives LED status indicators. |
| Digital Test Equipment Sequencers | Legacy System Emulation Hardware |
Use Scenario: Generating precise stimulus patterns for boundary-scan testing of ASIC prototypes using pattern memory addressing. IC Role / Device Role / Timing Role: State machine controller sequencing address bits and control strobes; toggling mode used for auto-increment enable. Use Value: 80MHz fMAX and sub-15ns propagation delay support 12.5ns minimum test cycle time; balanced tPLH/tPHL prevents metastability in multi-clock-domain handshaking. | Use Scenario: Replacing obsolete 74LS73 in retro-computing FPGA co-processor boards emulating 1980s-era CPU bus protocols. IC Role / Device Role / Timing Role: Synchronous register holding microcode step counters and ALU carry flags in hardwired control units. Use Value: Pin-for-pin and function-for-function compatibility eliminates PCB redesign; 2µA quiescent current reduces thermal load in dense vintage-style layouts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual J-K flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HC73N | Same logic function and pinout; TI version rated for –40°C to +85°C only (not extended temp). | Limited to commercial/industrial ambient environments; not suitable for under-hood or uncooled enclosures. | Select when cost sensitivity outweighs extended temperature requirement and board space allows same DIP-14 footprint. |
| CD74HC73E | Identical AC/DC specs but packaged in PDIP with different mechanical tolerances (e.g., lead coplanarity, body dimensions). | No functional difference; may require revalidation of wave-solder profile due to minor package variation. | Choose for cross-supplier sourcing continuity where ST part availability is constrained but full spec compliance is mandatory. |
Compared with SN74HC73N and CD74HC73E, the M74HC73B1R uniquely supports –55°C to +125°C operation while maintaining identical pinout and logic behavior - making it the only option qualified for harsh-environment industrial control without derating or redesign.
Availability
M74HC73B1R is available at Aetrix Electronics and suitable for industrial counter modules, PLC I/O expansion, digital test equipment sequencers, and legacy system emulation hardware requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for M74HC73B1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, digital, and mixed-signal ICs for automotive, industrial, and power applications.
The M74HC73B1R belongs to ST's high-speed CMOS logic family, engineered specifically for industrial control systems requiring extended temperature operation, low power, and pin compatibility with legacy 74-series logic.
FAQ
Is M74HC73B1R compatible with 5V TTL logic levels?
Yes - its VIH minimum is 4.2V and VIL maximum is 1.8V at VCC = 6V, ensuring reliable interfacing with standard 5V TTL outputs. Input thresholds scale with VCC, so at 5V supply, VIH is ~3.5V and VIL is ~1.5V, maintaining safe noise margins against TTL swing.
Does M74HC73B1R support preset functionality?
No - the M74HC73B1R provides only asynchronous clear (active-low), not preset. The device name "M74HC73" reflects the standard 74HC73 function set: dual J-K flip-flops with individual clear inputs but no preset pins. For preset-capable equivalents, consider M74HC107 or SN74HC107.
What is the maximum capacitive load this device can drive reliably?
With CL = 50 pF (per datasheet AC test condition), propagation delays and fMAX are guaranteed. Driving >100 pF increases tPLH/tPHL nonlinearly and may reduce fMAX below specification; for >100 pF loads, add a buffer stage or verify timing margins using the CPD = 35 pF value and ICC(opr) = CPD × VCC × fIN + ICC/2 equation.
Can both flip-flops operate independently with different clocks?
Yes - pins 1 (1CK) and 5 (2CK) are fully isolated clock inputs, allowing independent triggering of each J-K section. This enables dual asynchronous state machines on one chip, such as separate event counters or independent control sequencers sharing only VCC and GND rails.
M74HC73B1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- 74HC
- Package/Case:
- 14-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Function:
- Set(Preset) and Reset
- Type:
- JK Type
- Output Type:
- Complementary
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Clock Frequency:
- 80 MHz
- Max Propagation Delay @ V, Max CL:
- 21ns @ 6V, 50pF
- Trigger Type:
- Negative Edge
- Current - Output High, Low:
- 5.2mA, 5.2mA
- Voltage - Supply:
- 2V ~ 6V
- Current - Quiescent (Iq):
- 2 µA
- Input Capacitance:
- 5 pF
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 14-DIP
M74HC73B1R FAQ
1.How can I place an order for M74HC73B1R through Aetrix?
Please submit a Request for Quotation (RFQ) for M74HC73B1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M74HC73B1R reliable?
The price and inventory of M74HC73B1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M74HC73B1R is usually 5 days.
3.What payment methods are accepted for M74HC73B1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M74HC73B1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M74HC73B1R?
M74HC73B1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M74HC73B1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M74HC73B1R?
For technical support, including M74HC73B1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M74HC73B1R requirements.
6.How does Aetrix verify that M74HC73B1R is sourced from the original manufacturer or authorized distributors?
All M74HC73B1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M74HC73B1R meets industry standards.
7.What is the process for return or replacement of M74HC73B1R?
All M74HC73B1R units undergo pre-shipment inspection (PSI). If there is an issue with M74HC73B1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M74HC73B1R part is unused and in its original packaging.
Return procedure for M74HC73B1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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