STMicroelectronics M93C46-RMN3TP/K
- Part No.:
- M93C46-RMN3TP/K
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
M93C46-RMN3TP/K.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:36,903
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
M93C46-RMN3TP/K from STMicroelectronics is an automotive-grade 1-Kbit MICROWIRE™ serial EEPROM with dual x8/x16 organization, 1.8–5.5 V single-supply operation, and AEC-Q100 Grade 1 qualification for -40 °C to +125 °C environments. It supports byte/word write in ≤4 ms, sequential read, READY/BUSY signaling via Q pin, and embedded Power-on Data Protection for robustness in engine control units and body electronics.
For engineers reviewing the M93C46-RMN3TP/K datasheet, M93C46-RMN3TP/K pinout, M93C46-RMN3TP/K application, or M93C46-RMN3TP/K equivalent, key selection criteria include its 1-Kbit capacity, SO8 narrow (150 mil) RoHS-compliant package, 2 MHz max clock rate, 4 million write cycles at 25 °C, and explicit ORG-pin configurable memory width - critical for legacy MCU interface compatibility and automotive ECU firmware storage.
Technical Context
The M93C46-RMN3TP/K implements a synchronous MICROWIRE™ protocol with start-bit–driven instruction framing, supporting READ, WRITE, WEN/WDS, ERASE, ERAL, and WRAL commands. Its internal address counter auto-increments during sequential reads, and wraps on overflow without external intervention.
Memory organization is selected dynamically via the ORG pin: tied to VSS for 128-byte (x8) mode (7-bit addressing), or left open/VCC for 64-word (x16) mode (6-bit addressing). Write operations are internally self-timed and do not require pre-erase; BUSY status is signaled on Q while S is high.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 1 Kbit (1024 bits), configurable as 128 × 8-bit bytes or 64 × 16-bit words |
| Supply voltage | 1.8 V to 5.5 V - enables direct interfacing with 1.8 V, 3.3 V, and 5 V MCUs without level shifters |
| Max clock rate | 2 MHz - sets maximum serial bus throughput at 250 kB/s (x8) or 125 kB/s (x16) for read bursts |
| Write time | ≤4 ms per byte or word - defines minimum instruction gap before next command or status polling |
| Endurance | 4 million write cycles at 25 °C - supports frequent calibration data logging in automotive sensors |
| Data retention | 50 years at 125 °C - ensures firmware parameter integrity over full vehicle lifetime under hood conditions |
| Operating temp | -40 °C to +125 °C - qualified per AEC-Q100 Grade 1 for engine control, transmission, and ADAS modules |
Pinout & Package
Package: SO8 narrow (150 mil width), RoHS-compliant and Halogen-free ECOPACK2®.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| S | Chip Select Input | Active-low enable; must be held high during BUSY polling to read Q pin status |
| C | Serial Clock Input | Synchronous edge-triggered timing reference; supports 0 Hz (static) to 2 MHz operation |
| D | Serial Data Input | Accepts instruction op-codes, addresses, and write data on rising C edge |
| Q | Serial Data Output | Outputs read data MSB-first; signals BUSY (low) / READY (high) when S = high |
| ORG | Organization Select Input | Configures x8 (VSS) or x16 (open/VCC) memory mapping; affects address bit count and instruction length |
| VCC | Supply Voltage | 1.8–5.5 V power rail; requires local 10–100 nF decoupling capacitor near pins |
| VSS | Ground | Reference return path; must be low-impedance for stable read/write margins |
| NC | No Connect | Do-not-use pin reserved for factory test; may be left floating, tied to VCC, or tied to VSS |
Key Features
| Feature | Design Value |
|---|---|
| READY/BUSY signaling | Real-time programming status feedback on Q pin without requiring timeout-based polling |
| Dual memory organization | Hardware-selectable x8/x16 mode via ORG pin - preserves pin compatibility across 1K–16K family variants |
| Power-on Data Protection | Automatic write inhibition during VCC ramp-up/down - prevents corruption during brown-out or reset |
| Enhanced ESD protection | ≥4 kV HBM - improves reliability in manufacturing handling and automotive assembly environments |
| Sequential read mode | Continuous data stream with auto-address increment and rollover - reduces host CPU overhead for block reads |
Applications
| Engine Control Unit (ECU) | Body Control Module (BCM) |
|---|---|
|
Use Scenario: Storing adaptive fuel trim values, learned idle parameters, and fault code history in gasoline/diesel powertrain controllers. IC Role / Device Role / Timing Role: Nonvolatile configuration storage with guaranteed 125 °C operation and 50-year data retention under hood thermal cycling. Use Value: Enables OEM compliance with ISO 16750-4 thermal endurance requirements without external temperature compensation. |
Use Scenario: Retaining window position memory, seat position presets, and lighting configuration across ignition cycles in premium vehicles. IC Role / Device Role / Timing Role: Low-power, high-endurance EEPROM interfaced directly to 3.3 V CAN/LIN microcontrollers via MICROWIRE™. Use Value: Eliminates need for external voltage translators or backup capacitors due to 1.8–5.5 V supply range and built-in POR. |
| Advanced Driver Assistance Systems (ADAS) | Electric Power Steering (EPS) |
|
Use Scenario: Saving camera calibration offsets, radar alignment data, and sensor fusion coefficients after factory setup or field updates. IC Role / Device Role / Timing Role: AEC-Q100 Grade 1 nonvolatile memory co-located with vision processor SoCs for minimal trace routing. Use Value: Supports secure over-the-air (OTA) update rollback via WRAL/ERAL instructions without external erase controllers. |
Use Scenario: Maintaining torque sensor zero-point compensation, motor phase advance tables, and fault recovery states in steering assist ECUs. IC Role / Device Role / Timing Role: High-reliability parameter store operating continuously at 105–125 °C near EPS motor drivers. Use Value: Delivers 4M write cycles at 25 °C and 600k at 125 °C - sufficient for >15-year service life with daily recalibration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25010B-MAHL-T | 1-Kbit SPI interface, 5.5 V max, -40 °C to +85 °C industrial grade only | Lacks AEC-Q100 qualification and 125 °C rating; no ORG-pin organization flexibility | Select only for non-automotive cost-sensitive designs where SPI is preferred and extended temperature is not required |
| M95010-RMN6TP/K | 1-Kbit SPI interface, same SO8 package, AEC-Q100 Grade 1, but no READY/BUSY pin | Requires software timeout for write completion; lacks hardware BUSY signaling on Q pin | Choose when migrating from MICROWIRE™ to SPI infrastructure and can tolerate polling-based write confirmation |
Compared with AT25010B-MAHL-T and M95010-RMN6TP/K, the M93C46-RMN3TP/K uniquely combines MICROWIRE™ compatibility, hardware BUSY signaling, dual x8/x16 organization, and full AEC-Q100 Grade 1 qualification - making it irreplaceable for legacy automotive platforms requiring pin- and protocol-level drop-in replacement.
Availability
M93C46-RMN3TP/K is available at Aetrix Electronics and suitable for engine control units, body control modules, ADAS calibration storage, and electric power steering systems requiring stable component supply across automotive production lifecycles.
Supply support for M93C46-RMN3TP/K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader specializing in automotive, industrial, and power management ICs, with broad portfolio coverage from microcontrollers to analog and memory solutions.
The M93C46-RMN3TP/K belongs to the M93Cx6-A125 automotive EEPROM product line, designed specifically for mission-critical nonvolatile storage in harsh-temperature automotive subsystems where data integrity and long-term reliability are mandatory.
FAQ
What is the function of the ORG pin on the M93C46-RMN3TP/K?
The ORG pin selects memory organization: tied to VSS enables 128-byte (x8) mode with 7-bit addressing; left open or tied to VCC enables 64-word (x16) mode with 6-bit addressing. This pin must be statically set before device initialization and cannot be changed dynamically during operation. Its state directly determines instruction length and address decoding behavior per the M93C46-specific instruction table.
How does the READY/BUSY signal work on the Q pin?
When Chip Select (S) is high, the Q pin outputs READY (high) if idle or programming complete, or BUSY (low) during active write/erase cycles. This hardware status signal eliminates the need for fixed software timeouts - host MCU can poll Q synchronously with S high and C low to detect completion. The signal remains valid until S goes low or next instruction begins.
Is the M93C46-RMN3TP/K compatible with standard MICROWIRE™ bus masters?
Yes - it fully complies with the industry-standard MICROWIRE™ protocol, including start-bit detection, op-code framing, and synchronous serial timing. It supports all seven standard instructions (READ, WRITE, WEN, WDS, ERASE, ERAL, WRAL) with documented clock cycle counts and timing diagrams. No protocol translation or glue logic is required for integration with legacy 8051, PIC, or automotive MCU peripherals.
What packaging and environmental certifications apply to this part?
M93C46-RMN3TP/K uses an SO8 narrow (150 mil) package with ECOPACK2® compliance - meaning RoHS-compliant and halogen-free construction. It is qualified to AEC-Q100 Grade 1 (-40 °C to +125 °C), with full characterization of write endurance (4M cycles at 25 °C), data retention (50 years at 125 °C), and ESD robustness (≥4 kV HBM), as verified in ST's official production datasheet DocID024752 Rev 5.
M93C46-RMN3TP/K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8, 64 x 16
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
M93C46-RMN3TP/K FAQ
1.How can I place an order for M93C46-RMN3TP/K through Aetrix?
Please submit a Request for Quotation (RFQ) for M93C46-RMN3TP/K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M93C46-RMN3TP/K reliable?
The price and inventory of M93C46-RMN3TP/K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M93C46-RMN3TP/K is usually 5 days.
3.What payment methods are accepted for M93C46-RMN3TP/K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M93C46-RMN3TP/K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M93C46-RMN3TP/K?
M93C46-RMN3TP/K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M93C46-RMN3TP/K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M93C46-RMN3TP/K?
For technical support, including M93C46-RMN3TP/K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M93C46-RMN3TP/K requirements.
6.How does Aetrix verify that M93C46-RMN3TP/K is sourced from the original manufacturer or authorized distributors?
All M93C46-RMN3TP/K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M93C46-RMN3TP/K meets industry standards.
7.What is the process for return or replacement of M93C46-RMN3TP/K?
All M93C46-RMN3TP/K units undergo pre-shipment inspection (PSI). If there is an issue with M93C46-RMN3TP/K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M93C46-RMN3TP/K part is unused and in its original packaging.
Return procedure for M93C46-RMN3TP/K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
M93C46-RMN3TP/K Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
