My Inquiry
My Account
STMicroelectronics M93C86-WDW6TP
- Part No.:
- M93C86-WDW6TP
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
M93C86-WDW6TP.pdf
- Description:
- IC EEPROM 16KBIT MIC WIRE 8TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:7,771
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
M93C86-WDW6TP from STMicroelectronics is a 16-Kbit serial EEPROM with MICROWIRE™ interface, configurable as 2048 × 8-bit bytes or 1024 × 16-bit words, operating from 2.5 V to 5.5 V at up to 2 MHz clock frequency, and rated for -40 °C to +85 °C industrial temperature range. It supports byte/word/page write (≤5 ms), offers 4 million write cycles, and 200-year data retention - used in microcontroller configuration storage, calibration data logging, and secure boot parameter retention.
For engineers reviewing the M93C86-WDW6TP datasheet, M93C86-WDW6TP pinout, M93C86-WDW6TP application, or M93C86-WDW6TP equivalent, key selection considerations include MICROWIRE™ bus compatibility, dual x8/x16 organization via ORG pin, READY/BUSY status signaling, enhanced ESD protection (4 kV HBM), and ECOPACK2-compliant SO8N package footprint.
Technical Context
The M93C86-WDW6TP implements a static CMOS MICROWIRE™-compliant serial interface with start-bit–driven instruction framing, supporting seven deterministic instructions (READ, WRITE, WEN, WDS, ERASE, ERAL, WRAL). Its dual-memory organization is selected dynamically via the ORG pin (VSS = x8, floating/VCC = x16), enabling flexible byte- or word-aligned access without hardware redesign.
Internal write cycles are self-timed and automatically preceded by erase; completion is signaled via Q pin (READY = high, BUSY = low) while S is asserted. A built-in clock pulse counter validates instruction length (22 cycles for READ x8, 29 for WRITE x16), rejecting corrupted commands due to noise-induced clock glitches.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 16 Kbit (2048 bytes or 1024 words), directly addressable via 11-bit (x8) or 10-bit (x16) addressing |
| Interface protocol | MICROWIRE™ serial bus: 4-wire (S, C, D, Q) with start-bit synchronization and op-code decoding |
| Supply voltage | 2.5 V to 5.5 V - enables direct interfacing with 3.3 V and 5 V MCUs without level-shifting |
| Write endurance | 4 million write cycles at 25 °C - supports frequent field-updatable configuration storage |
| Data retention | 200 years at 55 °C - ensures long-term reliability in unpowered storage applications |
| Operating temperature | -40 °C to +85 °C - qualified for industrial and automotive under-hood environments |
| ESD rating | 4000 V HBM - reduces susceptibility to handling damage and board-level ESD events |
Pinout & Package
Package: SO8N (150 mil width), ECOPACK2-compliant, surface-mount 8-pin small outline.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Power supply input | 2.5–5.5 V DC supply; requires local 10–100 nF decoupling capacitor |
| VSS | Ground reference | Return path for all internal circuitry; must be low-impedance |
| S | Chip select input | Active-high enable; must be pulled low during power-up to prevent spurious writes |
| C | Serial clock input | Edge-triggered timing source; max 2 MHz; pull-down recommended if MCU enters Hi-Z state |
| D | Serial data input | Instruction/address/data input sampled on rising edge of C |
| Q | Serial data output / READY-BUSY indicator | Outputs data (MSB-first) or signals BUSY (low) / READY (high) during programming |
| ORG | Organization select input | Configures memory map: tied to VSS = x8 mode (2048 bytes), floating/VCC = x16 mode (1024 words) |
| DU | Do-not-use test pin | No functional role; may be left open, tied to VCC, or tied to VSS per ST recommendation |
Key Features
| Feature | Design Value |
|---|---|
| Dual memory organization | Runtime-selectable x8 or x16 mapping via single ORG pin - eliminates need for multiple BOM variants |
| Self-timed write cycle | ≤5 ms byte/page write with automatic erase-before-write - simplifies host firmware timing control |
| READY/BUSY status signaling | Q pin doubles as status flag - enables polling-based write completion detection without external components |
| Clock pulse validation | On-chip counter rejects malformed instructions caused by clock noise - prevents accidental memory corruption |
| Enhanced robustness | 4 kV HBM ESD rating and latch-up immunity - improves field reliability in noisy industrial systems |
Applications
| MCU Configuration Storage | Calibration Data Logging |
|---|---|
Use Scenario: Storing bootloader settings, peripheral initialization parameters, and user-defined I/O mappings in embedded controllers. IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed at power-on reset via MICROWIRE™ before main application starts. Use Value: Enables field-upgradable firmware behavior without requiring reprogramming of main flash or external NVM management logic. | Use Scenario: Recording sensor offset/gain coefficients and environmental compensation tables during factory calibration. IC Role / Device Role / Timing Role: Write-once or infrequent-write persistent storage for precision analog subsystems. Use Value: Maintains traceable calibration integrity across product lifetime, supported by 200-year data retention and 4M-cycle endurance. |
| Secure Boot Parameter Retention | Industrial Control State Backup |
Use Scenario: Holding cryptographic keys, signature verification flags, and secure boot policy bits in safety-critical devices. IC Role / Device Role / Timing Role: Tamper-resistant storage element with write-protection via WEN/WDS instruction sequence. Use Value: Prevents unauthorized modification of boot chain integrity controls through hardware-enforced write disable after initial provisioning. | Use Scenario: Saving operational state (e.g., valve positions, setpoint history, fault counters) during unexpected power loss in PLCs and motor drives. IC Role / Device Role / Timing Role: Fast-access nonvolatile scratchpad with ≤5 ms write latency and guaranteed retention over 10+ years. Use Value: Eliminates need for supercapacitor-backed SRAM or complex wear-leveling algorithms in cost-sensitive industrial controllers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25160B-SSHL-T | SPI interface (not MICROWIRE™), 16 Kbit, 2.5–5.5 V, 20 MHz max clock | Requires SPI-capable MCU; lacks ORG pin for dynamic x8/x16 reconfiguration | Select when higher throughput is needed and SPI is already implemented in system design |
| M93C86-WMN6TP | Identical electrical specs and pinout, but in TSSOP8 (169 mil) instead of SO8N | Same functionality; differs only in mechanical footprint and thermal characteristics | Select for space-constrained PCB layouts where TSSOP8's smaller body improves routing density |
Compared with AT25160B-SSHL-T, M93C86-WDW6TP provides native MICROWIRE™ compatibility and dual-organization flexibility; compared with M93C86-WMN6TP, it offers identical functionality in a wider SO8N package with improved thermal dissipation and legacy footprint support.
Availability
M93C86-WDW6TP is available at Aetrix Electronics and suitable for MCU configuration storage, calibration data logging, secure boot parameter retention, and industrial control state backup requiring stable component supply, long-lifecycle assurance, and ECOPACK2-compliant packaging.
Supply support for M93C86-WDW6TP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.
The M93Cx6 series targets cost-sensitive, space-constrained embedded systems needing reliable, low-pin-count serial EEPROM with flexible memory mapping and robust industrial qualification.
FAQ
What is the function of the ORG pin on M93C86-WDW6TP?
The ORG pin selects memory organization: when tied to VSS, the device operates in x8 mode (2048 bytes); when floating or tied to VCC, it operates in x16 mode (1024 words). This pin must be statically configured at power-up and held stable during operation to avoid undefined behavior or increased standby current.
How does the READY/BUSY signal work during a write operation?
During active programming (WRITE, ERASE, WRAL, ERAL), asserting S high causes Q to go low (BUSY); once complete, Q returns high (READY). This occurs after tW (max 5 ms) and requires no external components - enabling simple polling-based firmware flow control without timers or interrupts.
Can M93C86-WDW6TP be used with a 1.8 V microcontroller?
No - M93C86-WDW6TP is the 'W' variant, specified for 2.5 V to 5.5 V operation. For 1.8 V systems, use the 'R' variant (e.g., M93C86-RDW6TP), which supports 1.8–5.5 V and shares identical pinout and instruction set but different DC characteristics.
Is the DU pin required to be connected?
No - the DU (Do Not Use) pin is reserved for ST internal test purposes and has no functional role. It may be left unconnected, tied to VCC, or tied to VSS per ST's DS1077 recommendation; no electrical impact results from any of these configurations.
M93C86-WDW6TP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 16Kbit
- Memory Organization:
- 2K x 8, 1K x 16
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
M93C86-WDW6TP FAQ
1.How can I place an order for M93C86-WDW6TP through Aetrix?
Please submit a Request for Quotation (RFQ) for M93C86-WDW6TP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M93C86-WDW6TP reliable?
The price and inventory of M93C86-WDW6TP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M93C86-WDW6TP is usually 5 days.
3.What payment methods are accepted for M93C86-WDW6TP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M93C86-WDW6TP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M93C86-WDW6TP?
M93C86-WDW6TP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M93C86-WDW6TP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M93C86-WDW6TP?
For technical support, including M93C86-WDW6TP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M93C86-WDW6TP requirements.
6.How does Aetrix verify that M93C86-WDW6TP is sourced from the original manufacturer or authorized distributors?
All M93C86-WDW6TP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M93C86-WDW6TP meets industry standards.
7.What is the process for return or replacement of M93C86-WDW6TP?
All M93C86-WDW6TP units undergo pre-shipment inspection (PSI). If there is an issue with M93C86-WDW6TP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M93C86-WDW6TP part is unused and in its original packaging.
Return procedure for M93C86-WDW6TP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
M93C86-WDW6TP Tags
-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology
-
AT21CS01-STUM10-T
Microchip Technology
-
AT24C02C-SSHM-T
Microchip Technology
-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics
-
AT24CS02-SSHM-T
Microchip Technology
-
93LC46BT-I/OT
Microchip Technology
-
AT24C04C-SSHM-T
Microchip Technology
-
24LC01BT-I/SN
Microchip Technology
-
24AA02UIDT-I/OT
Microchip Technology
-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
