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STMicroelectronics M95010-RMN6TP
- Part No.:
- M95010-RMN6TP
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
M95010-RMN6TP.pdf
- Description:
- IC EEPROM 1KBIT SPI 20MHZ 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:9,074
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Product details
Overview
M95010-RMN6TP from STMicroelectronics is a 1-Kbit (128-byte) serial SPI bus EEPROM with 1.8 V to 5.5 V single-supply operation, 20 MHz max clock frequency, and ECOPACK2-compliant SO8N package. It provides byte/page write capability within 5 ms, 4 million write cycles, and 200-year data retention - deployed in industrial control modules for nonvolatile parameter storage across power-loss events.
For engineers reviewing the M95010-RMN6TP datasheet, M95010-RMN6TP pinout, M95010-RMN6TP application, or M95010-RMN6TP equivalent, key selection factors include its 1.8 V minimum supply, hardware/software write protection (quarter/half/whole array), HOLD signal for SPI transaction pausing, and ECC x1 bit-error correction on read operations.
Technical Context
This EEPROM implements a standard SPI interface with CPOL=0/CPHA=0 or CPOL=1/CPHA=1 mode support, using dedicated D (input), Q (output), C (clock), S (chip select), W (write protect), and HOLD (pause) terminals. All instructions are MSB-first, with instruction latching on rising C edge and data output on falling C edge.
It integrates an internal high-voltage generator and sequencer for write operations, plus a status register with volatile WEL/WIP bits and non-volatile BP1/BP0 block-protection bits. The memory array is organized as 128 × 8 bits, with 16-byte page boundaries and optional identification page support (not implemented in M95010-R).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 1 Kbit (128 bytes), organized as 128 × 8-bit array - defines maximum persistent configuration storage capacity. |
| Supply voltage range | 1.8 V to 5.5 V - enables direct interfacing with 1.8 V, 3.3 V, and 5 V microcontrollers without level-shifting. |
| Max SPI clock frequency | 20 MHz - supports high-throughput firmware updates or calibration data writes in time-constrained systems. |
| Write time (byte/page) | ≤5 ms - ensures predictable worst-case latency for non-blocking firmware routines during parameter save operations. |
| Data retention | 200 years at +25 °C - guarantees long-term integrity of stored calibration, serial numbers, or device-specific settings. |
| Endurance | 4 million write cycles - supports frequent field-updatable parameters in telemetry or sensor calibration applications. |
| Operating temperature | −40 °C to +85 °C - validated for use in industrial automation, automotive body electronics, and outdoor metering equipment. |
| Error correction | ECC x1 per byte - automatically corrects single-bit errors during read, improving reliability in electrically noisy environments. |
Pinout & Package
Package: SO8N (ECOPACK2, 150 mil width), RoHS- and halogen-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 – S (Chip Select) | Active-low device enable | Selects device for SPI communication; falling edge required after power-up before first instruction. |
| 2 – W (Write Protect) | Hardware write lock input | Low state disables all write operations (WRITE, WRSR); must not float - ties to VCC or GND via pull-up/down. |
| 3 – VSS | Ground reference | Common return path for all signals and supply; decoupling capacitor (10–100 nF) required near pin. |
| 4 – C (Serial Clock) | SPI timing input | Drives sampling (rising edge) and output (falling edge); supports up to 20 MHz; requires external pull-down if bus master resets mid-transaction. |
| 5 – Q (Serial Data Output) | SPI data output | Drives MSB-first read data; high-impedance when deselected or during HOLD; requires external pull-up if shared bus. |
| 6 – VCC | Power supply | 1.8–5.5 V input; internal POR circuit prevents spurious writes until stable; decoupling mandatory. |
| 7 – D (Serial Data Input) | SPI data input | Receives MSB-first instructions, addresses, and write data; sampled on rising edge of C. |
| 8 – HOLD | SPI transaction pause | Pauses ongoing SPI transfer without deselecting device; requires C low to activate/deactivate; high-impedance Q during hold. |
Key Features
| Feature | Design Value |
|---|---|
| Software-configurable write protection | BP1/BP0 bits in status register allow quarter/half/whole array lock - enables secure storage of factory calibration or security keys. |
| HOLD signal support | Enables real-time interruption of SPI transfers (e.g., during MCU interrupt servicing) without losing command context or requiring re-synchronization. |
| Power-on reset (POR) circuit | Prevents accidental writes during power ramp-up by holding device in standby until VCC exceeds internal threshold (~1.5 V typical). |
| Transparent ECC x1 | Corrects single-bit errors on every read - eliminates need for external CRC checks in safety-critical logging or configuration recovery paths. |
| Two SPI modes supported | Compatible with both (CPOL=0,CPHA=0) and (CPOL=1,CPHA=1) - interoperates with diverse MCUs including STM32, PIC, and NXP Kinetis families. |
Applications
| Industrial PLC I/O Module | Smart Energy Meter |
|---|---|
|
Use Scenario: Storing channel-specific calibration coefficients and firmware revision metadata across power cycles. IC Role / Device Role / Timing Role: Nonvolatile configuration storage with deterministic 5 ms write latency and ECC-protected reads. Use Value: Eliminates recalibration after brownouts; ECC ensures accurate coefficient retrieval even under EFT-induced bit flips. |
Use Scenario: Retaining tamper-event logs, tariff tables, and meter serial number in utility-grade meters. IC Role / Device Role / Timing Role: Secure, long-life parameter storage with hardware write-protect (W pin) and software block-lock (BP bits). Use Value: Prevents unauthorized overwrite of billing data; 200-year retention meets ANSI C12.22 compliance requirements. |
| Automotive Body Control Unit | Medical Infusion Pump |
|
Use Scenario: Saving user preferences (mirror position, seat memory) and diagnostic trouble codes (DTCs) in 12 V vehicle systems. IC Role / Device Role / Timing Role: Low-voltage EEPROM (1.8 V min) tolerant of battery droop during cranking; operates down to −40 °C. Use Value: Maintains settings during cold starts; wide VCC range avoids need for auxiliary LDO in cost-sensitive BCM designs. |
Use Scenario: Storing drug library profiles, delivery history, and safety-critical alarm thresholds in Class II medical devices. IC Role / Device Role / Timing Role: High-reliability data storage with 4M-cycle endurance and ECC - critical for audit trail integrity. Use Value: Meets IEC 62304 SW safety classification requirements for permanent data storage; ECC reduces risk of corrupted dose records. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25010B-SSHL-T (Microchip) | 1 Kbit SPI EEPROM, 2.5–5.5 V supply, no HOLD pin, no ECC, 1 million write cycles. | Lacks HOLD functionality and ECC; suitable only where interrupt-safe SPI pauses and bit-error resilience are not required. | Choose for legacy 5 V-only designs where cost is primary and reliability margins are relaxed. |
| BR24G01FJ-WE2 (ROHM) | 1 Kbit I²C EEPROM, 1.7–5.5 V, built-in write protect, no HOLD, no ECC, 1 million cycles. | I²C interface instead of SPI; incompatible pinout and protocol; lacks HOLD and ECC features. | Select only when system already uses I²C bus and SPI pins are unavailable; verify timing budget for slower I²C writes. |
Compared with AT25010B-SSHL-T and BR24G01FJ-WE2, M95010-RMN6TP uniquely combines 1.8 V operation, HOLD signal, ECC, and 4 million cycles - making it optimal for new industrial and medical designs demanding robustness and real-time SPI control.
Availability
M95010-RMN6TP is available at Aetrix Electronics and suitable for industrial PLCs, smart energy meters, automotive body control units, and medical infusion pumps requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for M95010-RMN6TP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.
M95010-RMN6TP belongs to ST's serial EEPROM product line, engineered for reliable, low-voltage, high-endurance nonvolatile storage in resource-constrained embedded systems with stringent reliability requirements.
FAQ
Does M95010-RMN6TP support SPI Mode 3 (CPOL=1, CPHA=1)?
Yes, M95010-RMN6TP supports both SPI Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1). In both modes, data is latched on the rising edge of C and output on the falling edge. The difference lies only in idle clock polarity - Mode 3 holds C high when inactive, enabling compatibility with MCUs like certain STM32 and NXP S32K families that default to this configuration.
Can the HOLD pin be left unconnected?
No, the HOLD pin must be actively driven high or low - it must never be left floating. If unused, tie it to VCC via a 10 kΩ pull-up resistor to ensure predictable behavior. Leaving HOLD floating may cause unintended SPI pauses or communication failures due to noise coupling, especially in high-EMI industrial environments.
What happens if W (Write Protect) is held low during power-up?
When W is held low at power-up, all write operations (WRITE, WRSR, WRID) are disabled regardless of WEL or BP bit states. The device remains fully readable and responsive to READ/RDSR commands. This hardware lock takes precedence over software protection and persists until W is released high - a key safety feature for preventing inadvertent writes during system initialization.
Is the identification page available on M95010-RMN6TP?
No, the identification page (16-byte read/write/lockable area) is exclusive to M95040-DF order codes. M95010-RMN6TP has only the main 128-byte memory array and standard status register. Its part number suffix "R" denotes 1.8–5.5 V operation but does not include the DF-series extended feature set.
M95010-RMN6TP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
M95010-RMN6TP FAQ
1.How can I place an order for M95010-RMN6TP through Aetrix?
Please submit a Request for Quotation (RFQ) for M95010-RMN6TP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95010-RMN6TP reliable?
The price and inventory of M95010-RMN6TP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95010-RMN6TP is usually 5 days.
3.What payment methods are accepted for M95010-RMN6TP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95010-RMN6TP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95010-RMN6TP?
M95010-RMN6TP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95010-RMN6TP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95010-RMN6TP?
For technical support, including M95010-RMN6TP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95010-RMN6TP requirements.
6.How does Aetrix verify that M95010-RMN6TP is sourced from the original manufacturer or authorized distributors?
All M95010-RMN6TP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95010-RMN6TP meets industry standards.
7.What is the process for return or replacement of M95010-RMN6TP?
All M95010-RMN6TP units undergo pre-shipment inspection (PSI). If there is an issue with M95010-RMN6TP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95010-RMN6TP part is unused and in its original packaging.
Return procedure for M95010-RMN6TP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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