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STMicroelectronics M95020-RDW6TP
- Part No.:
- M95020-RDW6TP
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
M95020-RDW6TP.pdf
- Description:
- IC EEPROM 2KBIT SPI 20MHZ 8TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:7,690
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Product details
Overview
M95020-RDW6TP from STMicroelectronics is a 2-Kbit (256-byte) serial SPI bus EEPROM with 1.8 V to 5.5 V single-supply operation, 20 MHz max clock frequency, and ECOPACK2-compliant TSSOP8 package. It features page write capability (16-byte pages), hardware and software write protection (quarter/half/whole array), and on-chip ECC for single-bit error correction during read operations. It is used in industrial control modules for storing calibration data and configuration parameters requiring long-term nonvolatile retention.
For engineers reviewing the M95020-RDW6TP datasheet, M95020-RDW6TP pinout, M95020-RDW6TP application, or M95020-RDW6TP equivalent, key selection considerations include supply voltage range compatibility (1.8–5.5 V), SPI mode support (CPOL=0/1, CPHA=0/1), write endurance (>4 million cycles), data retention (>200 years), and identification page availability (not present in M95020-R variants).
Technical Context
The M95020-RDW6TP implements a standard SPI interface with four active signals (C, D, Q, S) plus HOLD and W control inputs. Its internal architecture includes an ECC x1 logic block per memory byte, a status register with BP1/BP0 block protection bits, and a power-on-reset circuit that ensures WEL and WIP bits initialize correctly at startup.
It supports two SPI modes (CPOL=0,CPHA=0 and CPOL=1,CPHA=1), latching input on rising C and outputting on falling C. The device enters hold state when HOLD is driven low while selected, suspending communication without resetting internal state - enabling multi-master arbitration in shared-bus systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 2 Kbit (256 × 8-bit array), directly addressable via 8-bit address field in READ/WRITE instructions |
| Supply voltage | 1.8 V to 5.5 V - enables direct interfacing with 1.8 V, 3.3 V, and 5 V microcontrollers without level shifters |
| Max clock frequency | 20 MHz - supports high-throughput configuration loading in real-time embedded systems |
| Write time | ≤5 ms per byte or per 16-byte page - deterministic timing simplifies firmware timeout handling |
| Data retention | 200+ years at +25 °C - ensures firmware parameter integrity across product lifecycle without refresh |
| Endurance | 4 million write cycles - sufficient for daily recalibration logging over 10+ years of operation |
| Operating temperature | −40 °C to +85 °C - qualified for industrial ambient environments including factory automation and outdoor gateways |
| ECC support | Single-bit error correction per byte - eliminates need for external CRC validation in safety-critical storage paths |
Pinout & Package
Package: TSSOP8 (169 mil width), RoHS-compliant and halogen-free (ECOPACK2).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (S) | Chip select | Active-low enable signal; falling edge required before first instruction; deselects device and places Q in high-impedance state |
| 2 (W) | Write protect | Hardware-level write lock; held low to disable all WRITE/WRSR commands regardless of WEL or BP bits |
| 3 (VSS) | Ground | Reference node for all digital and analog circuitry; must be decoupled near pin with 10–100 nF capacitor |
| 4 (C) | Serial clock | Timing reference for SPI; input sampled on rising edge (data in), output valid on falling edge (data out) |
| 5 (Q) | Serial data output | Tri-state output; drives MSB-first data during READ/RDSR; high-impedance when S is high or HOLD is active |
| 6 (HOLD) | Hold control | Pauses ongoing SPI transaction without deselecting device; requires S low and C low for clean entry/exit |
| 7 (D) | Serial data input | MSB-first instruction/address/data input; latched on rising edge of C; ignored during HOLD or write cycle |
| 8 (VCC) | Supply voltage | Power rail for core logic and I/O; must remain stable within 1.8–5.5 V during all operations including tW write cycle |
Key Features
| Feature | Design Value |
|---|---|
| Page write (16 bytes) | Reduces firmware overhead by enabling bulk writes with single instruction; avoids 256 individual byte-write calls |
| Software block protection | BP1/BP0 bits in status register allow runtime-selectable quarter/half/whole-array lock without hardware modification |
| Hardware write protect (W pin) | Physical pin-level override disables writes even if WEL is set - critical for field-upgrade safety in deployed systems |
| Integrated ECC x1 | Corrects single-bit soft errors on read without CPU intervention - improves reliability in electrically noisy industrial settings |
| Hold function | Enables bus arbitration in multi-device SPI systems by pausing transfers without losing address or state context |
| Power-on reset (POR) | Guarantees WEL=0 and WIP=0 at startup - prevents spurious writes during power ramp and ensures deterministic initialization |
Applications
| Industrial Sensor Calibration | Medical Device Configuration |
|---|---|
|
Use Scenario: Storing sensor offset/gain coefficients after factory calibration and field recalibration. IC Role / Device Role / Timing Role: Nonvolatile parameter store accessed during boot and maintenance mode; read at system startup, written only during calibration routines. Use Value: Retains calibrated values across 200+ years and 4M write cycles, eliminating need for battery-backed SRAM or external checksum logic. |
Use Scenario: Saving user-selected therapy parameters and device usage logs in portable infusion pumps. IC Role / Device Role / Timing Role: Secure configuration storage with hardware write protect enabled during normal operation to prevent accidental overwrite. Use Value: 1.8 V operation allows direct connection to low-power MCU rails; ECC ensures log integrity despite ESD events in clinical environments. |
| Smart Meter Firmware Settings | Automotive Body Control Module |
|
Use Scenario: Holding tariff schedules, meter ID, and tamper-detection flags in electricity/water meters. IC Role / Device Role / Timing Role: SPI EEPROM interfaced to metrology SoC; accessed during firmware update and meter commissioning. Use Value: −40 °C to +85 °C rating ensures operation inside sealed outdoor enclosures; page write minimizes update time during OTA patches. |
Use Scenario: Storing seat position memory, mirror presets, and lighting profiles in vehicle door modules. IC Role / Device Role / Timing Role: Persistent configuration store tied to LIN or CAN gateway MCU; written during user setup, read at ignition-on. Use Value: TSSOP8 package fits space-constrained automotive PCBs; 20 MHz SPI speed enables fast profile recall without delaying boot sequence. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25020B-SSHL-T (Microchip) | 2 Kbit SPI EEPROM, 1.8–5.5 V, 20 MHz, but lacks HOLD pin and ECC; uses different status register layout | No hold functionality limits use in multi-master SPI buses; no ECC increases risk of silent data corruption | Select only if HOLD and ECC are unused and legacy firmware compatibility with AT25xx series is required |
| BR25G20-3GE2 (ROHM) | 2 Kbit SPI EEPROM, 1.7–5.5 V, 20 MHz, includes HOLD and W pins, but no ECC and only 1 million write cycles | Lower endurance restricts frequent-field-update applications; absence of ECC reduces reliability in ESD-prone automotive cabins | Prefer for cost-sensitive consumer applications where 1M-cycle lifetime suffices and ECC is not mandated |
Compared with AT25020B-SSHL-T and BR25G20-3GE2, the M95020-RDW6TP uniquely combines HOLD functionality, on-die ECC, and 4M-cycle endurance in a TSSOP8 package - making it optimal for industrial and medical systems requiring robust, long-life configuration storage.
Availability
M95020-RDW6TP is available at Aetrix Electronics and suitable for industrial sensor calibration, medical device configuration, smart meter firmware settings, and automotive body control modules requiring stable component supply across extended product lifecycles.
Supply support for M95020-RDW6TP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.
The M950x0 family targets embedded systems needing reliable, low-voltage serial EEPROM with enhanced data integrity - optimized for space-constrained designs where SPI interface simplicity, long retention, and robust write protection are essential.
FAQ
Does M95020-RDW6TP support SPI Mode 3 (CPOL=1, CPHA=1)?
Yes, the M95020-RDW6TP supports both SPI Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1). In both modes, data is latched on the rising edge of the serial clock (C) and output changes on the falling edge. The difference lies only in idle clock polarity - Mode 3 holds C high when inactive, enabling interoperability with MCUs configured for that standard.
What is the function of the HOLD pin, and how is it used in practice?
The HOLD pin pauses ongoing SPI communication without deselecting the device or resetting internal state. To activate, HOLD must be driven low while chip select (S) is low and serial clock (C) is low. This is used in multi-master systems to temporarily yield the bus - for example, allowing a higher-priority controller to access shared SPI resources without aborting the current EEPROM transaction.
Can the write protection be configured to lock only the first 64 bytes of memory?
No - the M95020-RDW6TP's software block protection (via BP1/BP0 bits) only supports quarter-array (64 bytes), half-array (128 bytes), or full-array (256 bytes) locking. For M95020, quarter-array protection covers addresses 0xC0–0xFF (hex), which corresponds to the upper 64 bytes. There is no granularity below 64-byte blocks in this device.
Is the identification page available on M95020-RDW6TP?
No - the identification page (16-byte read/write/lockable area) is exclusive to the M95040-DF variant. The M95020-RDW6TP belongs to the M95020-R series and contains only the main 256-byte memory array and standard status register; no additional identification page or LID/WRID/RDID instructions are implemented.
M95020-RDW6TP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Kbit
- Memory Organization:
- 256 x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
M95020-RDW6TP FAQ
1.How can I place an order for M95020-RDW6TP through Aetrix?
Please submit a Request for Quotation (RFQ) for M95020-RDW6TP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95020-RDW6TP reliable?
The price and inventory of M95020-RDW6TP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95020-RDW6TP is usually 5 days.
3.What payment methods are accepted for M95020-RDW6TP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95020-RDW6TP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95020-RDW6TP?
M95020-RDW6TP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95020-RDW6TP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95020-RDW6TP?
For technical support, including M95020-RDW6TP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95020-RDW6TP requirements.
6.How does Aetrix verify that M95020-RDW6TP is sourced from the original manufacturer or authorized distributors?
All M95020-RDW6TP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95020-RDW6TP meets industry standards.
7.What is the process for return or replacement of M95020-RDW6TP?
All M95020-RDW6TP units undergo pre-shipment inspection (PSI). If there is an issue with M95020-RDW6TP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95020-RDW6TP part is unused and in its original packaging.
Return procedure for M95020-RDW6TP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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