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Home > Products > Integrated Circuits (ICs) > Memory > Memory

STMicroelectronics M95020-WMN6P

Name: M95020-WMN6P
Brand: STMicroelectronics
SKU: M95020-WMN6P
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: M95020-WMN6P

Manufacturer:: STMicroelectronics

Category:: Memory

Package:: 8-SOIC (0.154", 3.90mm Width)

Datasheet:: M95020-WMN6P.pdf

Description:: IC EEPROM 2KBIT SPI 20MHZ 8SOIC

Quantity:: RFQ Add To RFQ list

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Inventory:3,775

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Product details

Overview

M95020-WMN6P from STMicroelectronics is a 2-Kbit (256-byte) serial SPI bus EEPROM organized as 256 × 8 bits, operating from 2.5 V to 5.5 V supply, featuring 16-byte page write capability, hardware write protection (quarter/half/whole array), and 20 MHz max clock frequency. It is used in industrial control modules for parameter storage, firmware configuration backup, and calibration data retention.

For engineers reviewing the M95020-WMN6P datasheet, M95020-WMN6P pinout, M95020-WMN6P application, or M95020-WMN6P equivalent, key selection criteria include V_CC range compatibility (2.5–5.5 V), SPI mode support (CPOL=0/1, CPHA=0/1), ECC-enabled read reliability, and identification-page lockability - all critical for embedded systems requiring long-term nonvolatile data integrity.

Technical Context

This device implements a fully SPI-compatible interface with dual-mode clock polarity support (CPOL=0/CPHA=0 and CPOL=1/CPHA=1), where input data is latched on the rising edge of C and output data is valid on the falling edge. It integrates an internal high-voltage generator and sequencer for EEPROM programming, plus ECC×1 logic per byte to detect and correct single-bit read errors.

The memory includes a status register with volatile WEL/WIP bits and nonvolatile BP1/BP0 block-protection bits, enabling software-configurable write lock granularity. The HOLD pin allows pausing ongoing SPI transfers without deselecting the device, while the W pin provides hardware-level write disable independent of status register settings.

Key Specifications

Parameter	Value and Actual Design Meaning
Memory size	2 Kbit (256 × 8 bits) - supports compact firmware parameter storage without external address decoding logic.
Page size	16 bytes - enables efficient burst writes aligned to hardware page boundaries; reduces transaction overhead vs. byte-write-only devices.
Write time	≤5 ms per byte or page - ensures fast field-updatable configuration without blocking host MCU for extended periods.
Supply voltage	2.5 V to 5.5 V - interoperable with 3.3 V and 5 V microcontrollers, eliminating level-shifting in mixed-voltage systems.
Data retention	>200 years - guarantees calibration constants and security keys remain intact across product lifetime under industrial temperature stress.
Endurance	>4 million write cycles - supports frequent runtime logging or dynamic parameter tuning in telemetry and sensor nodes.
Operating temp	−40 °C to +85 °C - qualified for use in outdoor industrial enclosures, automotive body controllers, and factory automation PLCs.

Pinout & Package

Package: SO8N (ECOPACK2, 150 mil width), RoHS-compliant and halogen-free.

Pin/Terminal	Circuit Role	Design Meaning
S	Chip select	Active-low enable signal; must transition low-to-high at byte boundaries to initiate instructions; edge-sensitive reset behavior prevents spurious writes during power-up.
C	Serial clock	Master-generated timing signal; rising edge latches input (D), falling edge outputs data (Q); supports CPOL=0 or CPOL=1 modes.
D	Serial data input	Carries instruction opcodes, addresses, and write data; MSB-first protocol aligns with standard MCU SPI peripherals.
Q	Serial data output	Drives read data and status register contents; high-impedance when deselected or in HOLD state to avoid bus contention.
W	Write protect	Hardware-level write disable; held low to block all WRITE/WRSR/WRID operations regardless of WEL or BP bits - critical for fail-safe operation.
HOLD	Communication hold	Pauses active SPI transfer without resetting internal state; requires S low and C low for valid assertion - enables MCU context switching during EEPROM access.
V_CC	Supply voltage	2.5–5.5 V power rail; internal POR circuit enforces safe initialization only after V_CC stabilizes above threshold.
V_SS	Ground	Reference for all I/O and internal logic; decoupling capacitor (10–100 nF) required near pins to suppress supply noise during write cycles.

Key Features

Feature	Design Value
ECC × 1 per byte	Automatic detection and correction of single-bit read errors improves data reliability in electrically noisy environments without software overhead.
Flexible write protection	Software-selectable quarter/half/whole array lock via BP1/BP0 bits - enables secure partitioning of user data, calibration, and factory defaults.
Identification page	16-byte dedicated area (not present in M95020-W but confirmed absent per DS1639 Rev 14 Table 3 footnote) - not applicable to M95020-WMN6P.
Hold function	Non-disruptive pause of SPI communication preserves internal address pointer and instruction state - simplifies multitasking in RTOS-based hosts.
Power-on reset (POR)	Prevents spurious writes during power ramp-up by holding device in standby until V_CC exceeds internal threshold - eliminates need for external reset sequencing.

Applications

Industrial PLC Configuration Storage

Smart Meter Firmware Parameter Backup

Use Scenario: Storing I/O mapping tables, scaling coefficients, and alarm thresholds in programmable logic controllers deployed in factory floors.

IC Role / Device Role / Timing Role: Nonvolatile configuration memory interfaced directly to ARM Cortex-M7 MCU via SPI, accessed during boot and runtime reconfiguration.

Use Value: 200-year data retention ensures parameters survive 15+ year equipment lifetimes without battery backup; ECC prevents corrupted setpoints due to EMI-induced bit flips.

Use Scenario: Retaining tariff schedules, metering calibration constants, and cryptographic keys in ANSI C12.19-compliant electricity meters.

IC Role / Device Role / Timing Role: Secure parameter vault co-located with metrology SoC; write-protected blocks isolate factory-programmed keys from field updates.

Use Value: Hardware W pin + BP bits provide tamper-resistant write disable during power faults or firmware corruption events - meeting IEC 62056-21 security requirements.

Automotive Body Control Module (BCM)

Medical Infusion Pump Calibration Data

Use Scenario: Saving seat position presets, mirror angles, and lighting profiles in 12 V automotive BCMs operating across cold-crank conditions.

IC Role / Device Role / Timing Role: SPI EEPROM connected to 3.3 V CAN microcontroller; operates down to 2.5 V during cranking transients without data loss.

Use Value: 2.5 V minimum V_CC tolerance enables reliable operation during engine start (V_BAT dip to ~6 V → 3.3 V rail drop <2.5 V avoided), preventing configuration erasure.

Use Scenario: Storing flow-rate calibration curves, motor step compensation values, and safety interlock flags in Class II medical infusion pumps.

IC Role / Device Role / Timing Role: Safety-critical nonvolatile memory certified to ISO 13485; accessed only during pre-infusion self-test sequences.

Use Value: >4M write endurance supports daily recalibration over 10-year service life; ECC ensures dose accuracy remains unaffected by radiation-induced soft errors.

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
AT25DF021A-SSH-T	2 Mbit flash (not EEPROM); no built-in ECC; 1.7–3.6 V supply; lacks HOLD pin.	Requires external wear-leveling and error-handling firmware; unsuitable for direct replacement in ECC-dependent safety systems.	Select only if migrating to flash-based architecture with firmware support for reliability management.
BR24G02FJ-WE2	2 Kbit I²C EEPROM; 1.7–5.5 V; no HOLD or identification page; slower 400 kHz max clock.	Limited to I²C-bus systems; incompatible with SPI-only hosts; no hardware pause capability for real-time interrupt handling.	Choose only for space-constrained designs where I²C routing simplifies board layout and timing margins allow slower access.

Compared with AT25DF021A-SSH-T and BR24G02FJ-WE2, M95020-WMN6P uniquely delivers SPI-native 20 MHz operation, integrated ECC, and HOLD functionality - making it optimal for deterministic, safety-aware embedded systems where data integrity and real-time bus arbitration are mandatory.

Availability

M95020-WMN6P is available at Aetrix Electronics and suitable for industrial PLCs, smart meters, automotive body control modules, and medical infusion pumps requiring stable component supply across multi-year production cycles.

Supply support for M95020-WMN6P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.

M95020-WMN6P belongs to ST's serial EEPROM product line, engineered specifically for robust, low-power, SPI-based nonvolatile storage in harsh electromagnetic and thermal environments - emphasizing long-term data fidelity and seamless integration with mainstream MCUs.

FAQ

Is M95020-WMN6P pin-compatible with other M950x0-W variants like M95010-W or M95040-W?

Yes - all M950x0-W devices share identical 8-pin SO8N, TSSOP8, and UFDFPN8 packages and pin assignments (S, C, D, Q, W, HOLD, V_CC, V_SS). Memory size differences (1K/2K/4K) do not affect physical or electrical pinout, enabling footprint reuse across designs with varying storage needs.

Does M95020-WMN6P support the identification page feature described in the datasheet?

No - the identification page (16-byte lockable area) is exclusive to M95040-DF order codes, as explicitly stated in Section 1 and Table 3 of DS1639 Rev 14. M95020-WMN6P has only the main 256-byte memory array and no dedicated ID page or LID/WRID instructions.

What SPI modes does M95020-WMN6P support, and how is clock polarity configured?

M95020-WMN6P supports two SPI modes: CPOL=0/CPHA=0 and CPOL=1/CPHA=1. Clock polarity is determined by the host MCU - no device-side configuration is needed. Input data is always latched on the rising edge of C, and output data appears on the falling edge, regardless of mode.

Can the HOLD pin be used during an active write cycle to pause programming?

No - HOLD is ignored during internal write cycles (t_W ≤ 5 ms). The device continues programming autonomously once WRITE or WRSR is initiated. HOLD only functions during active SPI communication (READ, RDSR, etc.) and cannot interrupt or suspend nonvolatile write operations.

M95020-WMN6P Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: -

Package/Case:: 8-SOIC (0.154", 3.90mm Width)

Packaging:: Tube

Product Status:: Active

Programmable:: Verified

Memory Type:: Non-Volatile

Memory Format:: EEPROM

Technology:: EEPROM

Memory Size:: 2Kbit

Memory Organization:: 256 x 8

Memory Interface:: SPI

Clock Frequency:: 20 MHz

Write Cycle Time - Word, Page:: 5ms

Access Time:: -

Voltage - Supply:: 2.5V ~ 5.5V

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 8-SOIC

M95020-WMN6P FAQ

1.How can I place an order for M95020-WMN6P through Aetrix?

Please submit a Request for Quotation (RFQ) for M95020-WMN6P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for M95020-WMN6P reliable?

The price and inventory of M95020-WMN6P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95020-WMN6P is usually 5 days.

3.What payment methods are accepted for M95020-WMN6P?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95020-WMN6P transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for M95020-WMN6P?

M95020-WMN6P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your M95020-WMN6P order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for M95020-WMN6P?

For technical support, including M95020-WMN6P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95020-WMN6P requirements.

6.How does Aetrix verify that M95020-WMN6P is sourced from the original manufacturer or authorized distributors?

All M95020-WMN6P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95020-WMN6P meets industry standards.

7.What is the process for return or replacement of M95020-WMN6P?

All M95020-WMN6P units undergo pre-shipment inspection (PSI). If there is an issue with M95020-WMN6P, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The M95020-WMN6P part is unused and in its original packaging.

Return procedure for M95020-WMN6P:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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