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STMicroelectronics M95040-WMN6TP
- Part No.:
- M95040-WMN6TP
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
M95040-WMN6TP.pdf
- Description:
- IC EEPROM 4KBIT SPI 20MHZ 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:42,286
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Product details
Overview
M95040-WMN6TP from STMicroelectronics is a 4-Kbit (512-byte) serial SPI bus EEPROM with 16-byte page architecture, 20 MHz max clock frequency, and 2.5 V to 5.5 V single-supply operation. It features hardware write protection (quarter/half/whole array), 4 million write cycles, 200-year data retention, and integrated ECC for single-bit error correction - deployed in industrial control modules for nonvolatile parameter storage across power-loss events.
For engineers reviewing the M95040-WMN6TP datasheet, M95040-WMN6TP pinout, M95040-WMN6TP application, or M95040-WMN6TP equivalent, key selection criteria include SPI mode compatibility (CPOL/CPHA = 0/0 or 1/1), hold functionality for interruptible communication, identification page support (in DF variant), and voltage-range alignment with host MCU I/O domains.
Technical Context
This device implements a standard SPI interface with dedicated HOLD and WRITE PROTECT inputs for real-time bus arbitration and memory lockdown. Its internal architecture includes an ECC x1 engine per byte, status register with WIP/WEL/BP bits, and a high-voltage generator enabling byte- and page-write operations within 5 ms.
It supports two SPI modes (CPOL=0/CPHA=0 and CPOL=1/CPHA=1), requires a falling edge on chip select (S) before instruction initiation, and enforces strict timing for write enable/disable sequences - all governed by a built-in power-on reset (POR) circuit that prevents spurious writes during VCC ramp-up.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 4 Kbit (512 × 8-bit array), organized as 32 pages of 16 bytes each |
| Interface | SPI bus compliant with CPOL/CPHA = (0,0) or (1,1); MSB-first, 8-bit instructions |
| Write speed | Byte or page write completes in ≤5 ms; no external delay required |
| Supply voltage | 2.5 V to 5.5 V - compatible with 3.3 V and 5 V logic systems without level shifting |
| Data retention | 200 years at +25 °C; validated under JEDEC JESD22-A117 stress conditions |
| Endurance | 4,000,000 write/erase cycles per memory location - sufficient for daily firmware logging over 10+ years |
| Operating temp | −40 °C to +85 °C - qualified for industrial-grade embedded controllers and sensor nodes |
Pinout & Package
Supplied in RoHS-compliant SO8N (ECOPACK2, 150 mil width) package - 8-pin small-outline integrated circuit with gull-wing leads, pin 1 marked by notch or dot.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| S | Chip Select | Active-low enable; falling edge initiates instruction decoding; high impedance Q output when deasserted |
| C | Serial Clock | Input timing reference; latches D on rising edge, drives Q on falling edge |
| D | Serial Data Input | Carries instruction opcodes, addresses, and write data; sampled on C rising edge |
| Q | Serial Data Output | Drives read data and status register contents; high impedance during HOLD or S high |
| W | Write Protect | Hardware lock: low disables all writes regardless of WEL or BP bits; must not float |
| HOLD | Communication Hold | Pauses active SPI transaction without deselecting device; requires S low and C low to activate |
| VCC | Supply Voltage | 2.5–5.5 V input; decoupling capacitor (10–100 nF) required near pins |
| VSS | Ground | Reference for all signals; must be connected directly to system ground plane |
Key Features
| Feature | Design Value |
|---|---|
| Integrated ECC x1 | Corrects single-bit errors on every read - eliminates need for external CRC or retry logic in safety-critical logs |
| Configurable block protection | BP1/BP0 bits in status register enable software-selectable write lock for upper quarter, half, or full memory array |
| HOLD function | Enables deterministic pause/resume of SPI transfers - essential for multi-master bus arbitration and real-time OS context switching |
| Power-on reset (POR) | Prevents spurious writes during VCC ramp-up by holding WEL=0 until stable supply is confirmed |
| Identification page (DF variant only) | 16-byte dedicated area for calibration data or security keys - permanently lockable via LID command (not applicable to -WMN6TP) |
Applications
| Industrial PLC Configuration Storage | Automotive Body Control Module (BCM) |
|---|---|
Use Scenario: Storing calibrated sensor offsets, I/O mapping tables, and user-defined logic parameters in programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed via SPI during boot and runtime reconfiguration. Use Value: Enables field-upgradable settings without firmware reflashing; ECC ensures integrity of critical calibration data across 10+ year deployments. | Use Scenario: Retaining door lock states, mirror position memory, and lighting profiles across vehicle ignition cycles. IC Role / Device Role / Timing Role: Parameter backup memory interfaced to BCM microcontroller via shared SPI bus with other sensors. Use Value: Supports >4M write cycles - exceeds lifetime requirement for daily user adjustments; 2.5–5.5 V range matches automotive 3.3 V MCU domains. |
| Medical Infusion Pump Calibration | Smart Energy Meter Firmware Logs |
Use Scenario: Archiving dose calibration coefficients, maintenance timestamps, and fault history in Class II medical devices. IC Role / Device Role / Timing Role: Secure, tamper-resistant storage element with hardware write protect enabled during normal operation. Use Value: 200-year data retention meets FDA long-term traceability mandates; ECC mitigates soft errors in radiation-prone environments. | Use Scenario: Logging grid voltage anomalies, tariff switch events, and firmware update records in ANSI C12.20-compliant meters. IC Role / Device Role / Timing Role: High-endurance log buffer synchronized to meter's real-time clock and SPI master controller. Use Value: 5 ms page writes allow burst logging without CPU blocking; −40 °C to +85 °C rating ensures outdoor cabinet reliability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25040B-SSHL-T | 4 Kbit SPI EEPROM; 1.8–5.5 V supply; no HOLD pin; 10 MHz max clock | Lacks HOLD functionality and ECC; lower max clock limits throughput in high-speed logging | Select when cost sensitivity outweighs need for hold arbitration or ECC robustness |
| BR24G04FJ-WE2 | 4 Kbit I²C EEPROM; 1.7–5.5 V; built-in write protect; no SPI interface | I²C-only interface requires different MCU peripheral and pull-up design; no HOLD or fast page write | Choose only if system already uses I²C bus and SPI pins are constrained |
Compared with AT25040B-SSHL-T and BR24G04FJ-WE2, M95040-WMN6TP delivers deterministic SPI bus control via HOLD, faster 20 MHz operation, and on-the-fly ECC correction - making it optimal for real-time industrial and automotive systems where data integrity and bus responsiveness are non-negotiable.
Availability
M95040-WMN6TP is available at Aetrix Electronics and suitable for industrial PLCs, automotive body control modules, medical infusion pumps, and smart energy meters requiring stable component supply across extended product lifecycles.
Supply support for M95040-WMN6TP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.
M95040-WMN6TP belongs to ST's serial EEPROM product line - engineered specifically for robust, low-power, high-reliability nonvolatile storage in resource-constrained embedded systems with stringent data integrity requirements.
FAQ
What SPI modes does M95040-WMN6TP support?
M95040-WMN6TP supports exactly two SPI modes: CPOL = 0, CPHA = 0 and CPOL = 1, CPHA = 1. In both, data is latched on the rising edge of C and output on the falling edge. The difference lies only in idle clock polarity - C remains low in mode (0,0) and high in mode (1,1). No other SPI modes are functional.
Does M95040-WMN6TP include an identification page?
No. The identification page (16-byte RDID/WRID/LID-capable area) is exclusive to the M95040-DF variant. M95040-WMN6TP is a -W suffix part and lacks this feature - its memory map is strictly 512 bytes of user EEPROM with no dedicated ID region.
How does hardware write protection (W pin) interact with software block protection (BP bits)?
When W is driven low, all write operations (WRITE, WRSR, WRID, LID) are disabled unconditionally - overriding any BP bit configuration. When W is high, BP1/BP0 bits determine which memory regions are software-locked. Both mechanisms are active simultaneously but W has priority; neither affects READ or RDSR operations.
What is the purpose of the HOLD pin, and how must it be timed?
HOLD pauses ongoing SPI communication without resetting state or deselecting the device. To activate, HOLD must go low while C is already low; to release, HOLD must go high while C remains low. Violating this timing causes undefined behavior - the device may ignore the hold request or enter an unrecoverable state until S is cycled.
M95040-WMN6TP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Kbit
- Memory Organization:
- 512 x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
M95040-WMN6TP FAQ
1.How can I place an order for M95040-WMN6TP through Aetrix?
Please submit a Request for Quotation (RFQ) for M95040-WMN6TP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95040-WMN6TP reliable?
The price and inventory of M95040-WMN6TP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95040-WMN6TP is usually 5 days.
3.What payment methods are accepted for M95040-WMN6TP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95040-WMN6TP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95040-WMN6TP?
M95040-WMN6TP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95040-WMN6TP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95040-WMN6TP?
For technical support, including M95040-WMN6TP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95040-WMN6TP requirements.
6.How does Aetrix verify that M95040-WMN6TP is sourced from the original manufacturer or authorized distributors?
All M95040-WMN6TP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95040-WMN6TP meets industry standards.
7.What is the process for return or replacement of M95040-WMN6TP?
All M95040-WMN6TP units undergo pre-shipment inspection (PSI). If there is an issue with M95040-WMN6TP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95040-WMN6TP part is unused and in its original packaging.
Return procedure for M95040-WMN6TP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
M95040-WMN6TP Tags
-
M24C02-WMN6TP
STMicroelectronics
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AT24C02C-XHM-T
Microchip Technology
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AT21CS01-STUM10-T
Microchip Technology
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AT24C02C-SSHM-T
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24LC01BT-I/OT
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M24C02-FMC6TG
STMicroelectronics
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AT24CS02-SSHM-T
Microchip Technology
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93LC46BT-I/OT
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AT24C04C-SSHM-T
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24LC01BT-I/SN
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24AA02UIDT-I/OT
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AT24C08C-STUM-T
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