STMicroelectronics M95080-DRDW3TP/K

Overview

M95080-DRDW3TP/K from STMicroelectronics is an automotive-grade 8-Kbit serial SPI EEPROM with AEC-Q100 Grade 0 qualification, operating up to 145 °C and supporting 20 MHz clock at V_CC ≥ 4.5 V. It features 1024 × 8-bit memory organized in 32-byte pages, integrated ECC logic for enhanced data integrity, and a dedicated 32-byte lockable Identification Page for device ID or secure parameter storage.

For engineers reviewing the M95080-DRDW3TP/K datasheet, M95080-DRDW3TP/K pinout, M95080-DRDW3TP/K application, or M95080-DRDW3TP/K equivalent, this device is selected for high-reliability automotive subsystems requiring extended temperature operation, fast page writes (≤4 ms), and configurable block write protection (1/4, 1/2, or full memory).

Technical Context

This SPI EEPROM implements CPOL=0/CPHA=0 and CPOL=1/CPHA=1 compatible protocols with edge- and level-sensitive Chip Select (S) for robust command initiation. Its internal logic includes a Write Enable Latch (WEL), status register with WIP and BP1/BP0 bits, and SRWD-controlled write protection coordinated with the external W pin.

The device integrates Schmitt-trigger inputs for noise immunity, supports Hold mode for communication pause without chip deselect, and embeds Error Correction Code (ECC x1) across the main memory array to detect and correct single-bit errors during read operations.

Key Specifications

Pinout & Package

Package: TSSOP8 (DW), 169 mil width, RoHS-compliant and halogen-free ECOPACK2®.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial SPI EEPROM applications.

Compared with AT25DF041A-SSH-T and BR24G08FJ-WE2, the M95080-DRDW3TP/K uniquely combines AEC-Q100 Grade 0 qualification, embedded ECC, lockable ID page, and SPI-compatible Hold functionality - making it the sole option for safety-critical, high-temperature automotive control nodes requiring both data integrity and hardware-enforced write security.

Availability

M95080-DRDW3TP/K is available at Aetrix Electronics and suitable for engine control units, ADAS camera modules, electric power steering systems, and transmission control modules requiring stable component supply across extended temperature ranges and long product lifecycles.

Supply support for M95080-DRDW3TP/K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader specializing in automotive, industrial, and power management solutions, with broad portfolio coverage from microcontrollers to analog and memory ICs.

The M95080 series belongs to ST's automotive-qualified serial EEPROM product line, designed specifically for mission-critical nonvolatile storage in harsh-temperature environments where data integrity, endurance, and functional safety are paramount.

FAQ

What is the purpose of the Identification Page and how is it secured?

The Identification Page is a dedicated 32-byte memory region used to store ST device identification codes or application-specific secure parameters. It can be written via the WRID instruction and permanently locked in read-only mode using the LID instruction. Once locked, no further writes are possible-even with WREN enabled-ensuring factory-programmed values remain tamper-proof throughout the device's operational life.

How does the SRWD bit interact with the W pin to protect the Status Register?

The SRWD bit controls whether the Status Register (including BP1/BP0 and WEL) can be modified. When SRWD = 1, the W pin becomes active: if W is driven low, all Status Register writes (WRSR) are discarded, freezing protection settings; if W is high, writes are permitted. This dual-layer mechanism prevents accidental or malicious reconfiguration of memory protection boundaries during field operation.

Can the M95080-DRDW3TP/K operate reliably at 145 °C while maintaining its full 20 MHz clock speed?

No. At 145 °C, the maximum supported clock frequency is 10 MHz, which requires V_CC ≥ 2.5 V. The 20 MHz specification applies only at V_CC ≥ 4.5 V and temperatures up to 125 °C. This derating is documented in Table 12 of the datasheet and reflects silicon performance limits under extreme thermal stress.

Does the embedded ECC correct errors during write operations or only during reads?

The ECC logic operates exclusively during read operations: it detects and corrects single-bit errors in data fetched from the main memory array. It does not apply to write operations, nor does it protect the Identification Page or Status Register. Write integrity relies on verified programming cycles and the device's 4-million-cycle endurance rating at 25 °C.