STMicroelectronics M95080-WMN6P

Overview

M95080-WMN6P from STMicroelectronics is an 8-Kbit serial SPI bus EEPROM organized as 1024 × 8 bits, serving as non-volatile configuration and calibration storage in microcontroller-based systems. It operates from 2.5 V to 5.5 V, supports up to 20 MHz clock frequency, delivers ≤5 ms page write time, and guarantees >4 million write cycles with >200-year data retention at -40 °C to +85 °C - deployed in industrial sensor nodes and automotive body control modules.

For engineers reviewing the M95080-WMN6P datasheet, M95080-WMN6P pinout, M95080-WMN6P application, or M95080-WMN6P equivalent, key selection criteria include its SO8N (150 mil) RoHS-compliant package, hardware/software write protection (BP1/BP0 + W pin), ECC-protected read reliability, and compatibility with SPI modes CPOL=0/CPHA=0 and CPOL=1/CPHA=1.

Technical Context

The device implements a dedicated SPI interface with edge-sensitive Chip Select (S) and HOLD signal for transaction pausing without deselection. Its internal architecture includes a status register with non-volatile BP1/BP0 bits for software-configurable memory block protection and SRWD bit enabling hardware lock of protection settings via the W input.

It integrates on-chip ECC x1 logic per byte for single-bit error correction during reads, transparent to the host protocol. The identification page (32 bytes) supports permanent read-only locking via LID instruction - a feature used for secure firmware versioning or device-specific calibration constants.

Key Specifications

Pinout & Package

Package: SO8N (150 mil width), RoHS-compliant and halogen-free (ECOPACK2).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Compared with AT25080B-SSHL-T and BR24G08NUX-10, M95080-WMN6P uniquely combines ECC-protected reads, a lockable identification page, and HOLD functionality - making it the only choice among the three for safety-critical or secure firmware storage applications.

Availability

M95080-WMN6P is available at Aetrix Electronics and suitable for industrial sensor calibration, automotive body control modules, smart energy meter firmware, and medical infusion pump settings requiring stable component supply across extended product lifecycles.

Supply support for M95080-WMN6P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, MEMS, and non-volatile memory solutions for industrial, automotive, and consumer markets.

M95080-WMN6P belongs to ST's serial EEPROM product line, engineered specifically for robust, low-power, and secure configuration storage in harsh environments - emphasizing data integrity, long-term retention, and SPI interoperability.

FAQ

What SPI modes does M95080-WMN6P support?

M95080-WMN6P supports two SPI modes: CPOL = 0, CPHA = 0 and CPOL = 1, CPHA = 1. In both, data is latched on the rising edge of C and output on the falling edge. The difference lies only in idle clock polarity - ensuring compatibility with STM32, PIC, and ARM Cortex-M microcontrollers without mode translation logic.

How does the identification page differ from main memory?

The identification page is a dedicated 32-byte area accessible only via RDID/WRID instructions. Unlike main memory, it can be permanently locked in read-only mode using the LID instruction - preventing overwrite of device-specific data like serial numbers or cryptographic keys even after full memory erase.

Can M95080-WMN6P operate at 2.5 V while maintaining 20 MHz clock speed?

Yes - the M95080-W variant is explicitly rated for 2.5 V to 5.5 V operation and supports up to 20 MHz clock frequency across this entire voltage range, as confirmed in DS8776 Rev 5 AC timing tables (tCLQV, tCLQX, tCLQV max = 50 ns at VCC = 2.5 V).

What happens if HOLD is asserted during a write cycle?

HOLD has no effect on an ongoing internal write cycle - the tW timer continues uninterrupted. However, HOLD pauses SPI communication: Q goes high-Z, and D/C are ignored. Once HOLD is deasserted, the device resumes normal SPI operation, but the write completes autonomously without host intervention.