STMicroelectronics M95128-DFCS6TP/K
- Part No.:
- M95128-DFCS6TP/K
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-UFBGA, WLCSP
- Datasheet:
-
M95128-DFCS6TP/K.pdf
- Description:
- IC EEPROM 128KBIT SPI 8WLCSP
- Quantity:
- Payment:

- Shipping:

Inventory:2,500
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Product details
Overview
M95128-DFCS6TP/K from STMicroelectronics is a 128-Kbit serial SPI bus EEPROM organized as 16,384 × 8 bits, operating from 1.7 V to 5.5 V over −40 °C to +85 °C. It features 64-byte page write capability (≤5 ms), an additional 64-byte Identification page with permanent lock capability, and hardware/software write protection for quarter/half/entire memory array.
For engineers reviewing the M95128-DFCS6TP/K datasheet, M95128-DFCS6TP/K pinout, M95128-DFCS6TP/K application, or M95128-DFCS6TP/K equivalent, key selection criteria include low-voltage operation down to 1.7 V, identification-page programmability, ECOPACK2®-compliant DFN8 (2×3 mm) packaging, and SPI mode compatibility (CPOL/CPHA = 0/0 or 1/1).
Technical Context
This device implements a standard SPI interface with dedicated HOLD and WRITE PROTECT inputs for real-time transaction suspension and non-volatile block protection control. Its internal architecture includes an HV generator, ECC-enabled sense amplifiers, and a status register with SRWD, BP1/BP0, WEL, and WIP bits for deterministic write sequencing and data integrity management.
It supports two SPI modes (CPOL=0/CPHA=0 and CPOL=1/CPHA=1), latching input on rising C edge and output on falling C edge. The Identification page (0x0000–0x003F) is accessible only via RDID/WRID instructions and can be permanently locked in read-only mode using LID instruction - a feature exclusive to the -DF variant.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 128 Kbit (16 Kbytes), organized as 16,384 × 8 bits - enables firmware parameter storage without external address decoding logic. |
| Page size & write time | 64 bytes per page; byte/page write ≤5 ms - allows efficient burst writes while minimizing MCU wait states. |
| Supply voltage range | 1.7 V to 5.5 V - supports direct interfacing with 1.8 V logic and legacy 3.3 V/5 V systems without level shifters. |
| Data retention | 200+ years - ensures long-term reliability in unattended industrial logging and calibration storage. |
| Endurance | 4 million write cycles - suitable for high-frequency configuration updates in metering or sensor calibration loops. |
| Operating temperature | −40 °C to +85 °C - qualified for automotive body electronics and industrial control environments. |
| SPI clock speed | Up to 20 MHz - enables fast bulk reads/writes, reducing host MCU SPI bus occupancy time. |
Pinout & Package
Package: UFDFPN8 (2 × 3 mm), ECOPACK2®-compliant, wettable flank design for automated optical inspection (AOI) and reliable reflow soldering.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| S | Chip select | Active-low enable; edge-sensitive at power-up - prevents spurious writes during voltage ramp. |
| C | Serial clock | Input timing reference; supports CPOL/CPHA = 0/0 or 1/1 - compatible with most microcontroller SPI peripherals. |
| D | Serial data input | Latches instruction/address/data on rising C edge - enables deterministic command framing. |
| Q | Serial data output | Drives data on falling C edge - ensures setup/hold compliance without external delay tuning. |
| HOLD | Communication pause | Halts ongoing SPI transfer without deselecting device - preserves internal state during MCU interrupt servicing. |
| W | Hardware write protect | Locks Status register when SRWD = 1 and W = low - provides tamper-resistant configuration lockdown. |
| VCC | Power supply | 1.7–5.5 V operation with internal POR - eliminates need for external reset supervisor in low-power designs. |
| VSS | Ground reference | Common return for all signals and internal charge pump - critical for stable HV generation during write cycles. |
Key Features
| Feature | Design Value |
|---|---|
| Identification page (64 bytes) | Dedicated, lockable memory region for calibration constants or security keys - prevents overwrite after field deployment. |
| Multi-level write protection | Software-configurable (BP1/BP0) + hardware-enforced (W + SRWD) protection - enables layered security for boot code and user data. |
| ECOPACK2® packaging | Lead-free, halogen-free, wettable flank DFN8 - meets IPC-A-610 Class 2 requirements and supports AOI-based production line verification. |
| Enhanced ESD robustness | ±4 kV HBM - reduces risk of latent damage during board handling and system integration. |
| Low-power standby mode | ICC1 ≤ 1 µA at VCC = 5.5 V - extends battery life in portable diagnostic tools and wireless sensors. |
Applications
| Smart Energy Metering | Automotive Body Control Module |
|---|---|
Use Scenario: Storing tariff tables, meter calibration coefficients, and tamper-event logs across 15+ year field lifetime. IC Role / Device Role / Timing Role: Non-volatile configuration and event log storage with permanent ID-page lockdown post-calibration. Use Value: 200-year data retention and 4M-cycle endurance ensure accurate billing history without periodic EEPROM replacement. | Use Scenario: Saving seat/mirror position presets, door lock configurations, and lighting profiles in vehicles with 12 V battery supply. IC Role / Device Role / Timing Role: Low-voltage (1.7 V) EEPROM for backup storage during cold-crank conditions below 6 V battery. Use Value: Guaranteed operation down to 1.7 V enables reliable recall of user preferences even during engine start transient. |
| Industrial PLC I/O Module | Medical Infusion Pump |
Use Scenario: Retaining channel-specific scaling factors, alarm thresholds, and firmware update metadata in DIN-rail mounted controllers. IC Role / Device Role / Timing Role: SPI-configurable, hardware-write-protected memory for safety-critical calibration parameters. Use Value: SRWD + W pin combination prevents accidental overwrites during field firmware updates or diagnostics. | Use Scenario: Storing drug library definitions, dose limits, and operator audit trails in battery-powered infusion devices. IC Role / Device Role / Timing Role: Tamper-evident, lockable Identification page for regulatory-mandated device serialization and calibration traceability. Use Value: Permanent LID instruction execution ensures immutable record of factory calibration - satisfies IEC 62304 software lifecycle requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25128B-MAHL-T | 1.8–5.5 V operation; no Identification page; 10 MHz max SPI clock; SO8/TSSOP8 only | Lacks permanent-lock ID page and 20 MHz support - unsuitable for secure calibration storage or high-throughput logging | Select if cost sensitivity outweighs ID-page security and speed requirements |
| BR24G128FJ-WE2 | I²C interface (not SPI); 1.7–5.5 V; 400 kHz/1 MHz; 8-pin SOP only; no HOLD pin | Requires I²C master; lacks HOLD functionality for interrupt-safe transfers; no hardware write protect pin | Select only for I²C-based designs where pin count and protocol alignment supersede SPI flexibility |
Compared with AT25128B-MAHL-T and BR24G128FJ-WE2, M95128-DFCS6TP/K uniquely combines 1.7 V operation, 20 MHz SPI, hardware HOLD, and lockable ID page - making it optimal for safety-critical, low-voltage, and high-integrity embedded storage.
Availability
M95128-DFCS6TP/K is available at Aetrix Electronics and suitable for smart energy metering, automotive body control modules, industrial PLC I/O modules, and medical infusion pumps requiring stable component supply, long-lifecycle assurance, and ECOPACK2®-compliant packaging.
Supply support for M95128-DFCS6TP/K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, delivering silicon solutions for automotive, industrial, and consumer markets with emphasis on energy efficiency and functional safety.
M95128-DF belongs to ST's serial EEPROM product line, engineered specifically for robust, low-voltage, high-reliability non-volatile storage in space-constrained, mission-critical embedded systems.
FAQ
What is the function of the HOLD pin on M95128-DFCS6TP/K?
The HOLD pin pauses ongoing SPI communication without deselecting the device or resetting internal state. When asserted low while S is low and C is low, Q goes high-impedance and D/C are ignored - enabling MCU interrupt servicing without losing transaction context. This is essential for deterministic real-time systems where SPI transfers must survive priority interrupts.
How does the Identification page differ from main memory in M95128-DFCS6TP/K?
The Identification page is a dedicated 64-byte region (address 0x0000–0x003F) accessible only via RDID/WRID instructions - not through standard READ/WRITE. It supports LID instruction to permanently disable further writes, making it ideal for storing immutable calibration data or cryptographic keys that must survive field updates and reprogramming cycles.
Can M95128-DFCS6TP/K operate reliably at 1.7 V during power-up transients?
Yes - its guaranteed 1.7 V minimum VCC enables operation during brown-out conditions such as automotive cold-crank (down to ~6 V battery, with regulator dropout). Internal POR circuitry holds the device inactive until VCC exceeds threshold (~1.2 V), and the WEL bit remains reset until stable supply is confirmed - preventing spurious writes during voltage ramp.
What SPI modes does M95128-DFCS6TP/K support, and how do they affect timing?
M95128-DFCS6TP/K supports CPOL=0/CPHA=0 and CPOL=1/CPHA=1 modes. In both, data is latched on the rising edge of C and output on the falling edge. The difference lies in idle clock polarity: C idles low in mode 0,0 and high in mode 1,1. This allows seamless integration with diverse MCU SPI peripherals without requiring clock inversion logic or firmware workarounds.
M95128-DFCS6TP/K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-UFBGA, WLCSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WLCSP (1.2x1.2)
M95128-DFCS6TP/K FAQ
1.How can I place an order for M95128-DFCS6TP/K through Aetrix?
Please submit a Request for Quotation (RFQ) for M95128-DFCS6TP/K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95128-DFCS6TP/K reliable?
The price and inventory of M95128-DFCS6TP/K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95128-DFCS6TP/K is usually 5 days.
3.What payment methods are accepted for M95128-DFCS6TP/K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95128-DFCS6TP/K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95128-DFCS6TP/K?
M95128-DFCS6TP/K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95128-DFCS6TP/K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95128-DFCS6TP/K?
For technical support, including M95128-DFCS6TP/K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95128-DFCS6TP/K requirements.
6.How does Aetrix verify that M95128-DFCS6TP/K is sourced from the original manufacturer or authorized distributors?
All M95128-DFCS6TP/K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95128-DFCS6TP/K meets industry standards.
7.What is the process for return or replacement of M95128-DFCS6TP/K?
All M95128-DFCS6TP/K units undergo pre-shipment inspection (PSI). If there is an issue with M95128-DFCS6TP/K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95128-DFCS6TP/K part is unused and in its original packaging.
Return procedure for M95128-DFCS6TP/K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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