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STMicroelectronics M95128-DFMN6TP
- Part No.:
- M95128-DFMN6TP
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
M95128-DFMN6TP.pdf
- Description:
- IC EEPROM 128KBIT SPI 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:6,665
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Product details
Overview
M95128-DFMN6TP from STMicroelectronics is a 128-Kbit serial SPI bus EEPROM organized as 16,384 × 8 bits, operating from 1.7 V to 5.5 V over –40 °C to +85 °C. It features 64-byte page write capability (≤5 ms), 4 million write cycles, 200-year data retention, and an additional lockable 64-byte Identification page for secure parameter storage. Used in industrial control modules for firmware revision tracking and calibration data persistence.
For engineers reviewing the M95128-DFMN6TP datasheet, M95128-DFMN6TP pinout, M95128-DFMN6TP application, or M95128-DFMN6TP equivalent, key selection criteria include low-voltage operation (1.7 V min), SPI mode compatibility (CPOL/CPHA = 0/0 or 1/1), hardware write protection via W pin and SRWD bit, and ECOPACK2®-compliant DFN8 (2 × 3 mm) packaging for space-constrained PCB layouts.
Technical Context
This EEPROM implements a synchronous serial interface compliant with SPI standards, supporting dual-phase clocking (CPOL=0/CPHA=0 and CPOL=1/CPHA=1). Internal high-voltage generation enables byte/page programming without external VPP, and on-chip ECC enhances reliability during read operations.
The device integrates a non-volatile Status register with BP1/BP0 for software-configurable quarter/half/full memory block protection, plus SRWD bit + W pin for hardware-enforced Status register lockdown. The dedicated Identification page (64 bytes) supports one-time programmable locking via LID instruction, enabling secure device serialization or calibration binding.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 128 Kbit (16 Kbytes), organized as 16384 × 8 bits - directly addressable via two-byte SPI address field |
| Supply voltage | 1.7 V to 5.5 V - enables direct interfacing with 1.8 V logic and legacy 3.3/5 V systems without level shifters |
| Write time | ≤5 ms per byte or per 64-byte page - ensures fast field updates without blocking host MCU for extended periods |
| Endurance | 4 million write cycles - supports frequent logging or configuration updates in telemetry and sensor nodes |
| Data retention | 200 years at 25 °C - guarantees long-term integrity of calibration coefficients and security keys across product lifecycle |
| SPI clock rate | Up to 20 MHz - allows high-throughput bulk reads (e.g., 16 KB in ~13 ms at 20 MHz with overhead) |
| Operating temp | –40 °C to +85 °C - qualified for industrial automation, automotive body electronics, and outdoor IoT gateways |
| ESD protection | Enhanced HBM ESD rating - improves robustness against handling and board-level transients in manufacturing environments |
Pinout & Package
Package: DFN8 (2 mm × 3 mm, 0.5 mm pitch), ECOPACK2®-compliant, wettable flank capable for automated optical inspection (AOI).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| S (Chip Select) | Active-low device enable | Edge-sensitive + level-sensitive input; requires falling edge after power-up before first command; deselects device and places Q in high-Z |
| C (Serial Clock) | SPI clock input | Drives timing for all I/O; data latched on rising edge (D), output valid on falling edge (Q); supports CPOL=0/1, CPHA=0/1 |
| D (Data In) | SPI MOSI input | Receives instruction opcodes, addresses, and write data; MSB-first; sampled on rising edge of C |
| Q (Data Out) | SPI MISO output | Transmits status register contents and memory data; MSB-first; driven on falling edge of C; high-Z when S is high or HOLD active |
| W (Write Protect) | Hardware lock control | Freezes BP1/BP0/SRWD bits when SRWD=1 and W=low - prevents accidental or malicious Status register modification |
| HOLD | Communication pause | Halts ongoing SPI transfer without deselecting device; Q goes high-Z, D/C ignored; resumes on HOLD high while S remains low |
| VCC | Power supply | 1.7–5.5 V analog/digital rail; requires local 10–100 nF decoupling capacitor near pins |
| VSS | Ground reference | Common return for all signals and internal circuitry; must be low-impedance connection to system GND plane |
Key Features
| Feature | Design Value |
|---|---|
| Identification page | 64-byte dedicated memory area with LID instruction for permanent read-only lock - enables secure device fingerprinting or factory calibration storage |
| Flexible write protection | Three-tier protection: software (BP1/BP0 bits), hardware (W pin + SRWD), and instruction-level (WREN prerequisite) - prevents unintended writes across power cycles and firmware updates |
| Low-voltage operation | 1.7 V minimum VCC - supports direct integration with battery-powered microcontrollers (e.g., STM32L series) without boost converters |
| High-speed SPI interface | 20 MHz max clock - reduces EEPROM access latency by >3× vs. legacy 5 MHz SPI EEPROMs, improving real-time logging throughput |
| ECOPACK2® packaging | DFN8 (2 × 3 mm) with wettable flanks - enables reliable reflow soldering and automated optical inspection in high-volume SMT lines |
| Robust power sequencing | Built-in POR with edge-sensitive Chip Select - eliminates spurious writes during brown-out or reset conditions without external reset IC |
Applications
| Industrial PLC I/O Modules | Automotive Body Control Units |
|---|---|
|
Use Scenario: Storing calibrated sensor offsets and module-specific configuration parameters across firmware updates and power cycles. IC Role / Device Role / Timing Role: Non-volatile configuration store accessed via SPI during boot and runtime; supports concurrent read/write with HOLD for interrupt-safe updates. Use Value: Enables field-replaceable I/O modules to retain calibration without requiring reprogramming or external database sync. |
Use Scenario: Persisting seat position memory, mirror angle settings, and lighting profiles tied to vehicle identification numbers (VIN). IC Role / Device Role / Timing Role: Secure parameter vault using locked Identification page for VIN binding and BP1/BP0 for partial memory lockdown during diagnostics. Use Value: Prevents unauthorized tampering with user preferences while allowing OEM service tools to update non-locked regions. |
| Medical Infusion Pump Calibration | Smart Energy Meter Firmware Logs |
|
Use Scenario: Recording dose history, motor calibration constants, and safety-critical fault logs with traceability and tamper resistance. IC Role / Device Role / Timing Role: High-reliability data logger with 4M write cycles and 200-year retention; uses HOLD to pause writes during motor activation interrupts. Use Value: Meets IEC 62304 Class C software requirements for persistent state storage without wear leveling overhead. |
Use Scenario: Capturing time-stamped energy consumption snapshots, tariff changes, and firmware update metadata in utility-grade meters. IC Role / Device Role / Timing Role: Low-power SPI EEPROM interfaced to metrology SoC; operates down to 1.7 V during battery backup mode. Use Value: Eliminates need for supercapacitor-backed SRAM, reducing BOM cost and board area while maintaining 10+ year data integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25DF041A-SSH-T | 4 Mbit density, quad SPI support, no Identification page, 2.7–3.6 V only | Lacks hardware-locked ID page and 1.7 V operation; suited for higher-density, fixed-voltage embedded systems | Select when >128 Kbit capacity or Quad SPI bandwidth is required, and low-voltage operation is not needed |
| BR24G128FJ-WE2 | Rohm 128 Kbit I²C EEPROM, 1.7–5.5 V, no HOLD pin, no ID page, 1 MHz max clock | Uses I²C instead of SPI; lacks HOLD functionality and programmable ID region; lower interface speed | Choose for designs already committed to I²C bus architecture where SPI resource contention is a concern |
Compared with AT25DF041A-SSH-T and BR24G128FJ-WE2, M95128-DFMN6TP uniquely combines ultra-low-voltage operation (1.7 V), SPI HOLD functionality for deterministic interrupt handling, and a cryptographically separable Identification page - making it optimal for safety-critical, battery-operated, and secure configuration applications.
Availability
M95128-DFMN6TP is available at Aetrix Electronics and suitable for industrial PLCs, automotive body controllers, medical infusion pumps, and smart energy meters requiring stable component supply, long-lifecycle assurance, and ECOPACK2®-compliant packaging.
Supply support for M95128-DFMN6TP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.
M95128-DFMN6TP belongs to ST's serial EEPROM product line, engineered specifically for robust, low-voltage, SPI-based non-volatile storage in space-constrained and safety-aware embedded systems.
FAQ
What is the function of the HOLD pin on M95128-DFMN6TP?
The HOLD pin pauses ongoing SPI communication without deselecting the device or resetting internal state. When asserted low while Chip Select (S) is active, Serial Data Output (Q) enters high-impedance, and Serial Clock (C) and Data Input (D) are ignored. This enables deterministic interruption of EEPROM transfers during MCU interrupts or real-time task preemption, resuming seamlessly when HOLD returns high.
How does the Identification page differ from standard memory array pages?
The Identification page is a dedicated 64-byte region accessible only via RDID/WRID instructions (not standard READ/WRITE). It supports permanent read-only locking via the LID instruction, which irreversibly sets internal fuses. Unlike regular memory, its contents survive full memory erase and cannot be overwritten once locked - making it ideal for storing immutable device identifiers, calibration signatures, or cryptographic keys.
Can M95128-DFMN6TP operate reliably at 1.7 V during write operations?
Yes. The M95128-DF variant is fully specified for write operations (byte and page) across the entire 1.7 V to 5.5 V range, including tW ≤ 5 ms maximum write time at 1.7 V. Internal charge pump and voltage regulation ensure consistent programming margin, validated per DS1356 Rev 20 AC/DC parameters - eliminating need for external voltage boosting in battery-powered applications.
What happens if Chip Select (S) is driven high mid-transfer?
Driving Chip Select (S) high mid-transfer aborts the current instruction and resets internal command decoding logic. If a WRITE command was partially received, the device initiates the write cycle for the last complete data byte received before S went high. For safety-critical use, this behavior mandates strict transaction framing and WIP bit polling before issuing subsequent commands to avoid partial writes.
M95128-DFMN6TP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
M95128-DFMN6TP FAQ
1.How can I place an order for M95128-DFMN6TP through Aetrix?
Please submit a Request for Quotation (RFQ) for M95128-DFMN6TP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95128-DFMN6TP reliable?
The price and inventory of M95128-DFMN6TP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95128-DFMN6TP is usually 5 days.
3.What payment methods are accepted for M95128-DFMN6TP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95128-DFMN6TP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95128-DFMN6TP?
M95128-DFMN6TP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95128-DFMN6TP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95128-DFMN6TP?
For technical support, including M95128-DFMN6TP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95128-DFMN6TP requirements.
6.How does Aetrix verify that M95128-DFMN6TP is sourced from the original manufacturer or authorized distributors?
All M95128-DFMN6TP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95128-DFMN6TP meets industry standards.
7.What is the process for return or replacement of M95128-DFMN6TP?
All M95128-DFMN6TP units undergo pre-shipment inspection (PSI). If there is an issue with M95128-DFMN6TP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95128-DFMN6TP part is unused and in its original packaging.
Return procedure for M95128-DFMN6TP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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