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Home > Products > Integrated Circuits (ICs) > Memory > Memory

STMicroelectronics M95128-DRMF3TG/K

Name: M95128-DRMF3TG/K
Brand: STMicroelectronics
SKU: M95128-DRMF3TG/K
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: M95128-DRMF3TG/K

Manufacturer:: STMicroelectronics

Category:: Memory

Package:: 8-WFDFN Exposed Pad

Datasheet:: M95128-DRMF3TG/K.pdf

Description:: IC EEPROM 128KBIT SPI 8MLP

Quantity:: RFQ Add To RFQ list

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Inventory:7,032

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Product details

Overview

M95128-DRMF3TG/K from STMicroelectronics is an AEC-Q100 Grade 0 qualified 128-Kbit serial SPI EEPROM designed for automotive powertrain and body control modules. It delivers 64-byte page write capability, operates from 1.7 V to 5.5 V, supports up to 20 MHz clock frequency, and guarantees data retention exceeding 50 years at 125 °C in SO8N package.

For engineers reviewing the M95128-DRMF3TG/K datasheet, M95128-DRMF3TG/K pinout, M95128-DRMF3TG/K application, or M95128-DRMF3TG/K equivalent, this device is selected for high-reliability automotive subsystems requiring extended temperature operation (–40 °C to +145 °C), embedded error correction code (ECC), and hardware/software write protection with lockable 64-byte identification page.

Technical Context

This EEPROM implements a true serial SPI interface compliant with CPOL=0/CPHA=0 and CPOL=1/CPHA=1 modes, with input latching on rising clock edge and output shifting on falling edge. Its memory array is organized as 256 × 64-byte pages (16,384 × 8 bits), augmented by a dedicated 64-byte identification page featuring ST-manufactured device ID and user-programmable fields.

Internal ECC logic enhances data integrity across the full memory array. The status register includes WIP (write-in-progress), WEL (write-enable latch), BP0/BP1 (block protect), and SRWD (status register write disable) bits - all nonvolatile except WIP and WEL - enabling precise software-controlled memory partitioning and hardware-assisted write protection via the W pin.

Key Specifications

Parameter	Value and Actual Design Meaning
Memory size	128 Kbit (16 Kbyte), organized as 256 pages × 64 bytes - enables efficient firmware patch storage and calibration parameter logging
Interface	SPI bus, up to 20 MHz - supports high-speed configuration loading in real-time automotive control loops
Operating voltage	1.7 V to 5.5 V - compatible with 3.3 V and 5 V microcontroller I/O domains without level-shifting
Temperature range	–40 °C to +145 °C (Grade 0) - validated for under-hood engine control units and transmission control modules
Write endurance	≥ 4 million cycles at 25 °C; ≥ 400,000 cycles at 145 °C - ensures long-term reliability in high-cycle diagnostic or logging applications
Data retention	≥ 50 years at 125 °C; ≥ 100 years at 25 °C - meets automotive functional safety requirements for permanent calibration storage
Page write time	Typically 3.4 ms (max 4 ms) - enables fast over-the-air (OTA) update staging without blocking critical control tasks

Pinout & Package

Package: SO8N (150 mil width), ECOPACK2-compliant, RoHS-compliant surface-mount package with standard 1.27 mm pitch.

Pin/Terminal	Circuit Role	Design Meaning
C	Serial clock input	Synchronizes instruction, address, and data transfer; latches inputs on rising edge, outputs change on falling edge
D	Serial data input	Receives instructions (e.g., WRITE, WRSR), addresses, and data; MSB-first protocol
Q	Serial data output	Drives read data during READ/RDSR/RDID; high-impedance when deselected or in HOLD
S	Chip select input	Edge- and level-sensitive active-low enable; requires falling edge after power-up to initiate first command
W	Hardware write protect	Controls SRWD bit behavior: when low and SRWD=1, locks status register against modification
HOLD	Communication pause	Halts ongoing SPI transaction without deselecting device; requires S low and C low to activate
VCC	Supply voltage	1.7–5.5 V power rail; supports wide-range automotive battery monitoring and ignition-switched systems
VSS	Ground reference	Common return path for all signals and internal circuitry; must be low-impedance for noise immunity

Key Features

Feature	Design Value
Embedded ECC logic	Corrects single-bit errors and detects multi-bit errors across full 128-Kbit array - improves functional safety compliance in ASIL-B systems
Lockable 64-byte ID page	Stores ST device ID (0x20, 0x00, 0x0E) plus user parameters; permanently read-only after LID command - prevents tampering of calibration or security keys
Four-level block protection	BP1/BP0 bits configure write protection for none / upper quarter / upper half / full memory + ID page - enables secure boot loader and runtime parameter segregation
Schmitt trigger inputs	On C, D, S, HOLD, W pins - rejects noise transients up to 30% VCC, critical for noisy automotive harness environments
Enhanced ESD/latch-up	4000 V HBM ESD rating and robust latch-up immunity - exceeds AEC-Q100 stress test requirements for under-hood deployment

Applications

Engine Control Unit (ECU)

Advanced Driver Assistance Systems (ADAS)

Use Scenario: Storing and updating fuel injection timing maps and knock sensor calibration coefficients during vehicle operation.

IC Role / Device Role / Timing Role: Nonvolatile configuration storage with ECC-protected read/write access synchronized to MCU SPI peripheral.

Use Value: Enables field-upgradable engine tuning while maintaining ASIL-B data integrity through embedded ECC and 145 °C operational margin.

Use Scenario: Retaining camera lens distortion parameters and radar object classification thresholds across ignition cycles.

IC Role / Device Role / Timing Role: Secure, lockable parameter storage accessed during boot and runtime via SPI interface with hardware write protection.

Use Value: Prevents unauthorized modification of ADAS calibration data using SRWD + W pin lock and 64-byte ID page permanent lockdown.

Transmission Control Module (TCM)

Body Control Module (BCM)

Use Scenario: Logging gear shift history and torque converter clutch engagement patterns for predictive maintenance analytics.

IC Role / Device Role / Timing Role: High-endurance EEPROM supporting >400k write cycles at 145 °C ambient - deployed adjacent to transmission oil pan.

Use Value: Delivers 50-year data retention at 125 °C and >4M cycles at 25 °C, ensuring lifetime reliability in thermally aggressive locations.

Use Scenario: Storing door lock actuator position offsets and seat memory profiles tied to driver ID.

IC Role / Device Role / Timing Role: Low-voltage (1.7 V) SPI EEPROM interfaced directly to 1.8 V/3.3 V microcontroller GPIOs without level shifters.

Use Value: Wide 1.7–5.5 V supply range allows direct connection to BCM power rails during cold-cranking (≤6 V) and stop-start operation.

Equivalent & Alternatives

The following parts are listed as comparable options for similar automotive EEPROM applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
AT25DF041A-SSH-T	4-Mbit density, no ECC, max 105 °C operation, lacks ID page locking	Not AEC-Q100 qualified; suitable only for industrial-grade infotainment head units	Select only if higher density is required and Grade 0 qualification is not mandated
BR24G128FJ-WE2	I²C interface (not SPI), 128 Kbit, –40 °C to +105 °C, no hold pin or identification page	Limited to lower-temperature body electronics; incompatible with SPI-based MCU peripherals	Choose only when I²C bus architecture is fixed and extended temperature is not required

Compared with AT25DF041A-SSH-T and BR24G128FJ-WE2, M95128-DRMF3TG/K uniquely combines AEC-Q100 Grade 0, 145 °C operation, embedded ECC, and lockable ID page - making it the sole option for safety-critical powertrain and ADAS calibration storage where data integrity and thermal resilience are non-negotiable.

Availability

M95128-DRMF3TG/K is available at Aetrix Electronics and suitable for engine control units, transmission control modules, advanced driver assistance systems, and body control modules requiring stable component supply across automotive production lifecycles.

Supply support for M95128-DRMF3TG/K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in automotive, industrial, and power management ICs with strong vertical integration and AEC-Q100 validation infrastructure.

This device belongs to ST's automotive-grade serial EEPROM product line, engineered specifically for mission-critical automotive subsystems demanding extended temperature operation, high reliability, and functional safety-aware memory architecture.

FAQ

What is the purpose of the HOLD pin on M95128-DRMF3TG/K?

The HOLD pin pauses ongoing SPI communication without deselecting the device or resetting the clock sequence. Activation requires S low and C low; during HOLD, Q enters high-impedance state while D and C are ignored. This enables MCU multitasking - e.g., servicing an interrupt - then resuming the exact same SPI transaction, preserving timing-critical sequences in real-time control systems.

How does the identification page differ from main memory?

The identification page is a dedicated 64-byte region containing factory-programmed ST device ID (0x20, 0x00, 0x0E) followed by user-writable space. Unlike main memory, it supports RDID/WRID instructions and can be permanently locked in read-only mode via the LID command - preventing overwrite of calibration keys or security tokens while allowing full read access throughout product life.

Can M95128-DRMF3TG/K operate reliably during automotive cold-cranking?

Yes. With a guaranteed operating voltage range of 1.7 V to 5.5 V and AEC-Q100 Grade 0 qualification, it functions correctly during cold-cranking events where battery voltage may dip to 3.0 V or lower. Its Schmitt trigger inputs reject noise common in cranking transients, and its 145 °C rating ensures stability even when mounted near hot engine components post-cranking.

What happens if a write command is issued to a protected memory block?

If BP1/BP0 bits configure protection for a memory region and a WRITE instruction targets that region, the command is discarded and no data is altered. The WIP bit remains 0, and the status register reflects no error - the device simply ignores the request. This silent rejection prevents accidental corruption of critical firmware or calibration data, aligning with ISO 26262 fault containment requirements.

M95128-DRMF3TG/K Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: -

Package/Case:: 8-WFDFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Memory Type:: Non-Volatile

Memory Format:: EEPROM

Technology:: EEPROM

Memory Size:: 128Kbit

Memory Organization:: 16K x 8

Memory Interface:: SPI

Clock Frequency:: 20 MHz

Write Cycle Time - Word, Page:: 4ms

Access Time:: -

Voltage - Supply:: 1.8V ~ 5.5V

Operating Temperature:: -40°C ~ 125°C (TA)

Grade:: Automotive

Qualification:: AEC-Q100

Mounting Type:: Surface Mount

Supplier Device Package:: 8-MLP (2x3)

M95128-DRMF3TG/K FAQ

1.How can I place an order for M95128-DRMF3TG/K through Aetrix?

Please submit a Request for Quotation (RFQ) for M95128-DRMF3TG/K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for M95128-DRMF3TG/K reliable?

The price and inventory of M95128-DRMF3TG/K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95128-DRMF3TG/K is usually 5 days.

3.What payment methods are accepted for M95128-DRMF3TG/K?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95128-DRMF3TG/K transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for M95128-DRMF3TG/K?

M95128-DRMF3TG/K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your M95128-DRMF3TG/K order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for M95128-DRMF3TG/K?

For technical support, including M95128-DRMF3TG/K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95128-DRMF3TG/K requirements.

6.How does Aetrix verify that M95128-DRMF3TG/K is sourced from the original manufacturer or authorized distributors?

All M95128-DRMF3TG/K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95128-DRMF3TG/K meets industry standards.

7.What is the process for return or replacement of M95128-DRMF3TG/K?

All M95128-DRMF3TG/K units undergo pre-shipment inspection (PSI). If there is an issue with M95128-DRMF3TG/K, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The M95128-DRMF3TG/K part is unused and in its original packaging.

Return procedure for M95128-DRMF3TG/K:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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