Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Part Number*
Quantity*
Message
Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Upload My List
Message

STMicroelectronics M95128-RMN6P

Part No.:
M95128-RMN6P
Manufacturer:
STMicroelectronics
Category:
Memory
Package:
8-SOIC (0.154", 3.90mm Width)
Datasheet:
AetrixM95128-RMN6P.pdf
Description:
IC EEPROM 128KBIT SPI 8SOIC
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:5,838

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Part Number
Quantity*
Price
Name*
Company
Email*
Comments

Product details

Overview

M95128-RMN6P from STMicroelectronics is a 128-Kbit serial SPI bus EEPROM organized as 16,384 × 8 bits, operating from 1.8 V to 5.5 V supply and supporting 20 MHz clock frequency. It features 64-byte page write capability, 4 million write cycles, 200-year data retention, and hardware/software write protection including quarter/half/whole array lock and an additional 64-byte Identification page with permanent read-only lock capability. It is used in industrial control modules for firmware parameter storage and calibration data logging.

For engineers reviewing the M95128-RMN6P datasheet, M95128-RMN6P pinout, M95128-RMN6P application, or M95128-RMN6P equivalent, this device is selected for low-voltage embedded systems requiring robust nonvolatile memory with fast SPI access, high endurance, and configurable block protection - especially where extended temperature operation (−40 °C to +85 °C) and ECOPACK2® packaging are required.

Technical Context

The M95128-RMN6P implements a standard SPI interface compliant with CPOL=0/CPHA=0 and CPOL=1/CPHA=1 modes, latching input data on rising clock edges and outputting data on falling edges. Its internal architecture includes a high-voltage generator, ECC-enabled sense amplifiers, page latches, and a status register with WIP, WEL, BP1/BP0, and SRWD bits for real-time write state monitoring and protection configuration.

It supports dual protection schemes: software-controlled via Status Register (BP1/BP0 bits) and hardware-enforced via the W pin combined with SRWD bit activation. The Identification page (64 bytes) is accessible only by RDID/WRID instructions and can be permanently locked using LID instruction - a feature absent in M95128-W and M95128-DF variants.

Key Specifications

Parameter Value and Actual Design Meaning
Memory size 128 Kbit (16 Kbytes), organized as 16,384 × 8 bits - sufficient for boot code metadata, calibration tables, or device identity storage in space-constrained designs.
Supply voltage range 1.8 V to 5.5 V - enables direct interfacing with 1.8 V logic (e.g., ARM Cortex-M0+ peripherals) without level shifters, reducing BOM count.
SPI clock frequency Up to 20 MHz - supports sub-100 µs page writes (≤5 ms), enabling rapid field-updatable configuration in real-time systems.
Write endurance 4 million write cycles per byte - exceeds typical industrial lifecycle requirements (e.g., 10 years at 100 writes/day).
Data retention 200 years at +25 °C - ensures long-term reliability of stored calibration or security keys without refresh mechanisms.
Operating temperature −40 °C to +85 °C - qualified for use in automotive body controllers, industrial PLC I/O modules, and outdoor metering equipment.
Page size 64 bytes - matches common MCU cache line sizes and simplifies alignment-aware firmware updates.
Write protection Configurable quarter/half/whole array lock via BP1/BP0 bits + hardware W-pin control - prevents accidental overwrites during firmware upgrades or brown-out conditions.

Pinout & Package

Package: TSSOP8 (169 mil width), ECOPACK2®-compliant, RoHS-compliant, surface-mountable with 0.65 mm pitch.

Pin/Terminal Circuit Role Design Meaning
S Chip Select Active-low enable signal; falling edge initiates SPI transaction and resets internal state - critical for deterministic power-up sequencing.
C Serial Clock Master-generated timing signal; rising edge latches input (D), falling edge outputs data (Q) - defines maximum 20 MHz interface bandwidth.
D Serial Data Input Input for instructions, addresses, and write data; MSB-first protocol requires precise setup/hold timing relative to C.
Q Serial Data Output Output for read data and status register contents; high-impedance when S is high or HOLD is asserted - enables multi-device SPI bus sharing.
W Write Protect Hardware lock for Status Register bits (BP1/BP0/SRWD); low + SRWD=1 enables Hardware Protected mode - prevents runtime corruption of protection settings.
HOLD Hold Control Pauses ongoing SPI transfer without deselecting device; allows host MCU to service interrupts while preserving transaction context - reduces software overhead.
VCC Supply Voltage 1.8–5.5 V power rail; requires local 10–100 nF decoupling capacitor - ensures stable internal HV generation during write cycles.
VSS Ground Reference Return path for all signals and internal charge pumps; must be low-impedance to prevent tW timing violations during write operations.

Key Features

Feature Design Value
Identification page (64 bytes) Dedicated nonvolatile area for secure parameters (e.g., MAC address, calibration coefficients); permanently lockable via LID instruction - eliminates need for external secure storage.
Enhanced ESD protection ±4 kV HBM - improves robustness in handling-sensitive manufacturing environments and field-replaceable modules without additional TVS components.
ECOPACK2® packaging Halogen-free, lead-free TSSOP8 with optimized thermal resistance - meets industrial environmental compliance (RoHS, REACH) and supports automated optical inspection (AOI).
Power-on reset (POR) circuit Internal POR threshold below VCC(min) - prevents spurious writes during power ramp-up, eliminating need for external reset supervisor ICs.
Hold functionality Preserves SPI state during MCU interrupt servicing - avoids retransmission overhead and maintains deterministic latency in time-critical applications like motor control.

Applications

Industrial Sensor Node Smart Energy Meter

Use Scenario: Stores sensor calibration coefficients, factory trim values, and last-known measurement offsets in battery-powered wireless nodes.

IC Role / Device Role / Timing Role: Nonvolatile configuration storage with guaranteed 200-year retention and 4M-cycle endurance under periodic OTA updates.

Use Value: Eliminates recalibration labor during field deployment and extends node lifetime beyond 10 years without memory replacement.

Use Scenario: Retains tariff schedules, billing counters, tamper logs, and cryptographic keys in DIN-rail mounted electricity meters.

IC Role / Device Role / Timing Role: Secure, write-protected parameter storage with hardware-enforced lock (W + SRWD) preventing unauthorized firmware or tariff manipulation.

Use Value: Meets IEC 62056-21 and DLMS/COSEM security requirements for revenue-grade metering without external secure elements.

Automotive Body Control Module Medical Diagnostic Handheld

Use Scenario: Saves seat/mirror position presets, lighting profiles, and error codes across ignition cycles in 12 V vehicle electrical systems.

IC Role / Device Role / Timing Role: Low-voltage (1.8 V compatible) EEPROM interfaced directly to 3.3 V microcontroller SPI peripheral - no level shifter needed.

Use Value: Enables seamless user experience with instant recall of preferences while meeting AEC-Q100 stress test requirements via −40 °C to +85 °C rating.

Use Scenario: Stores FDA-mandated device calibration history, usage counters, and firmware version fingerprints in portable diagnostic tools.

IC Role / Device Role / Timing Role: Tamper-evident storage with Identification page locked via LID instruction - provides audit trail integrity for regulatory submissions.

Use Value: Reduces design validation effort by fulfilling 21 CFR Part 11 electronic record requirements with on-chip locking instead of software-based checksums.

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Alternative Part Technical Difference Application Difference Selection Advice
AT25128B-SSHL-T (Microchip) 1.8–5.5 V supply, 20 MHz SPI, but lacks Identification page and LID locking; only 1 million write cycles. No permanent lock for sensitive parameters; unsuitable for regulatory audit trails requiring immutable storage. Select when cost sensitivity outweighs need for secure parameter lockdown and extended endurance.
BR24G128FJ-WE2 (ROHM) 1.7–5.5 V supply, 10 MHz max clock, integrated write protect pin, but no HOLD function or Identification page. Limited SPI throughput and missing HOLD increases MCU interrupt latency; no dedicated secure storage area. Prefer for ultra-low-power (<1 µA standby) applications where speed and advanced protection are secondary.

Compared with AT25128B-SSHL-T and BR24G128FJ-WE2, M95128-RMN6P uniquely delivers 4M write cycles, 200-year retention, hardware-locked Identification page, and HOLD functionality - making it optimal for safety-critical, audit-ready, and high-update-frequency embedded systems.

Availability

M95128-RMN6P is available at Aetrix Electronics and suitable for industrial sensor nodes, smart energy meters, automotive body control modules, and medical diagnostic handhelds requiring stable component supply across multi-year production cycles.

Supply support for M95128-RMN6P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.

M95128-RMN6P belongs to ST's serial EEPROM product line, engineered specifically for robust, low-voltage, high-endurance nonvolatile storage in resource-constrained embedded systems with stringent reliability and security requirements.

FAQ

What is the purpose of the Identification page in M95128-RMN6P?

The Identification page is a dedicated 64-byte memory region accessible only via RDID/WRID instructions. It stores sensitive application data such as calibration constants or device IDs and can be permanently locked in read-only mode using the LID instruction - a feature not present in M95128-W or M95128-DF variants.

How does the HOLD pin affect SPI communication timing?

When HOLD is driven low while Chip Select (S) is active, the device pauses data transfer without resetting internal state. Serial data output (Q) goes high-impedance, and D/C lines become don't-care. This preserves the exact bit position in ongoing transactions, allowing the host MCU to service interrupts and resume seamlessly - reducing software overhead in real-time systems.

Can M95128-RMN6P operate reliably at 1.8 V with full 20 MHz SPI performance?

Yes. Unlike M95128-W (2.5–5.5 V), the "R" suffix denotes extended low-voltage operation down to 1.8 V while maintaining full 20 MHz clock capability and all functional features including HOLD, Identification page, and hardware write protection - verified per DS1356 Rev 20 AC timing tables.

What happens if the Write Protect (W) pin is left floating during operation?

Leaving W floating violates the absolute maximum ratings and may cause unpredictable behavior: the SRWD bit could inadvertently enable Hardware Protected mode, blocking Status Register writes, or cause intermittent protection failures. STMicroelectronics specifies W must be actively driven high or low - a 10 kΩ pull-up to VCC is recommended for default unprotected operation.

M95128-RMN6P Specifications

Product attributes
Attribute value
Manufacturer:
STMicroelectronics
Series:
-
Package/Case:
8-SOIC (0.154", 3.90mm Width)
Packaging:
Tube
Product Status:
Active
Programmable:
Not Verified
Memory Type:
Non-Volatile
Memory Format:
EEPROM
Technology:
EEPROM
Memory Size:
128Kbit
Memory Organization:
16K x 8
Memory Interface:
SPI
Clock Frequency:
20 MHz
Write Cycle Time - Word, Page:
5ms
Access Time:
-
Voltage - Supply:
1.8V ~ 5.5V
Operating Temperature:
-40°C ~ 85°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
8-SOIC

M95128-RMN6P FAQ

1.How can I place an order for M95128-RMN6P through Aetrix?

Please submit a Request for Quotation (RFQ) for M95128-RMN6P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for M95128-RMN6P reliable?

The price and inventory of M95128-RMN6P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95128-RMN6P is usually 5 days.

3.What payment methods are accepted for M95128-RMN6P?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95128-RMN6P transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for M95128-RMN6P?

M95128-RMN6P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your M95128-RMN6P order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for M95128-RMN6P?

For technical support, including M95128-RMN6P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95128-RMN6P requirements.

6.How does Aetrix verify that M95128-RMN6P is sourced from the original manufacturer or authorized distributors?

All M95128-RMN6P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95128-RMN6P meets industry standards.

7.What is the process for return or replacement of M95128-RMN6P?

All M95128-RMN6P units undergo pre-shipment inspection (PSI). If there is an issue with M95128-RMN6P, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The M95128-RMN6P part is unused and in its original packaging.

Return procedure for M95128-RMN6P:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

M95128-RMN6P Tags

  • M95128-RMN6P
  • M95128-RMN6P PDF
  • M95128-RMN6P Datasheet
  • M95128-RMN6P Specifications
  • M95128-RMN6P Images
  • STMicroelectronics
  • STMicroelectronics M95128-RMN6P
  • Buy M95128-RMN6P
  • M95128-RMN6P Price
  • M95128-RMN6P Distributor
  • M95128-RMN6P Supplier
  • M95128-RMN6P Wholesale
Related Products
M24C02-WMN6TP
M24C02-WMN6TP

STMicroelectronics

AT24C02C-XHM-T
AT24C02C-XHM-T

Microchip Technology

AT21CS01-STUM10-T
AT21CS01-STUM10-T

Microchip Technology

AT24C02C-SSHM-T
AT24C02C-SSHM-T

Microchip Technology

24LC01BT-I/OT
24LC01BT-I/OT

Microchip Technology

M24C02-FMC6TG
M24C02-FMC6TG

STMicroelectronics

AT24CS02-SSHM-T
AT24CS02-SSHM-T

Microchip Technology

93LC46BT-I/OT
93LC46BT-I/OT

Microchip Technology

AT24C04C-SSHM-T
AT24C04C-SSHM-T

Microchip Technology

24LC01BT-I/SN
24LC01BT-I/SN

Microchip Technology

24AA02UIDT-I/OT
24AA02UIDT-I/OT

Microchip Technology

AT24C08C-STUM-T
AT24C08C-STUM-T

Microchip Technology

Tech Hub

Search

Search

PRODUCT

PRODUCT

PHONE

PHONE

USER

USER