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Home > Products > Integrated Circuits (ICs) > Memory > Memory

STMicroelectronics M95160-DRDW8TP/K

Name: M95160-DRDW8TP/K
Brand: STMicroelectronics
SKU: M95160-DRDW8TP/K
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: M95160-DRDW8TP/K

Manufacturer:: STMicroelectronics

Category:: Memory

Package:: 8-TSSOP (0.173", 4.40mm Width)

Datasheet:: M95160-DRDW8TP/K.pdf

Description:: IC EEPROM 16KBIT SPI 8TSSOP

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Product details

Overview

M95160-DRDW8TP/K from STMicroelectronics is a 16-Kbit (2 Kbyte) serial SPI EEPROM with 32-byte page architecture, 105 °C extended temperature rating, and 20 MHz max clock speed at V_CC ≥ 4.5 V. It integrates an embedded ECC logic for enhanced data integrity, features a dedicated 32-byte lockable Identification Page, and supports block write protection (1/4, 1/2, or full memory) - deployed in automotive body control modules for calibration storage under high-temperature engine bay conditions.

For engineers reviewing the M95160-DRDW8TP/K datasheet, M95160-DRDW8TP/K pinout, M95160-DRDW8TP/K application, or M95160-DRDW8TP/K equivalent, key selection criteria include its AEC-Q100 Grade 2 qualification, 4 million write cycles at 25 °C, 50-year data retention at 105 °C, and dual-voltage operation (1.7–5.5 V) enabling direct interface with 1.8 V, 3.3 V, and 5 V microcontrollers.

Technical Context

This SPI EEPROM implements CPOL=0/CPHA=0 and CPOL=1/CPHA=1 modes with input latching on rising clock edge and output shifting on falling edge. Its Status Register includes WIP (Write In Progress), WEL (Write Enable Latch), BP1/BP0 (block protection), and SRWD (Status Register Write Disable) bits - enabling hardware- and software-controlled write protection hierarchies.

The device uses true EEPROM technology with byte-alterable 2048 × 8-bit organization and embeds single-bit Error Correction Code (ECC x 1) per byte. The Identification Page (32 bytes) contains factory-programmed ST device ID (first 3 bytes) and user-configurable fields that can be permanently locked via LID instruction - supporting secure parameter binding in safety-critical firmware updates.

Key Specifications

Parameter	Value and Actual Design Meaning
Memory size	16 Kbit (2048 × 8 bits), organized as 64 pages of 32 bytes - enables efficient firmware patching with minimal bus overhead.
Max SPI clock	20 MHz at V_CC ≥ 4.5 V; 10 MHz at V_CC ≥ 2.5 V; 5 MHz at V_CC ≥ 1.7 V - ensures interoperability across 1.8 V, 3.3 V, and 5 V host systems.
Write endurance	4 million cycles at 25 °C; 1.2 million at 85 °C; 900 k at 105 °C - validated for >10-year service life in automotive under-hood applications.
Data retention	>50 years at 105 °C; 200 years at 55 °C - guarantees long-term calibration stability without refresh cycles.
Operating range	V_CC: 1.7–5.5 V; T_A: −40 to +105 °C - meets AEC-Q100 Grade 2 requirements for automotive electronics.
ESD protection	4000 V HBM - provides robustness against handling and board-level transients in manufacturing and field environments.
Write time	≤4 ms for byte or page write - enables deterministic timing in real-time control loops without polling delays.

Pinout & Package

Package: TSSOP8 (DW), 169 mil width, RoHS-compliant and halogen-free ECOPACK2®.

Pin/Terminal	Circuit Role	Design Meaning
S	Chip Select	Active-low enable signal; edge- and level-sensitive - prevents spurious writes during power-up or noise events.
C	Serial Clock	Input synchronizing all SPI transactions; supports both CPOL=0/CPHA=0 and CPOL=1/CPHA=1 modes.
D	Serial Data Input	Latches instructions, addresses, and write data on rising clock edge - MSB-first protocol ensures deterministic command parsing.
Q	Serial Data Output	Drives read data on falling clock edge; high-impedance when deselected or in Hold mode - avoids bus contention.
HOLD	Hold Control	Pauses ongoing SPI transfer without deselecting device - maintains internal state during host interrupt servicing.
W	Write Protect	Hardware pin controlling Status Register writability when SRWD = 1 - enables dual-layer (SW+HW) protection of BP bits.
V_CC	Supply Voltage	1.7–5.5 V operation - eliminates need for level shifters in mixed-voltage systems.
V_SS	Ground	Reference for all I/O and internal circuitry - requires low-impedance connection to minimize noise coupling.

Key Features

Feature	Design Value
Embedded ECC x 1	Single-bit error correction per byte - improves functional safety compliance without external redundancy logic.
Identification Page	32-byte dedicated area with factory ID + user space - enables secure device authentication and immutable parameter binding.
Block protection	Configurable 1/4, 1/2, or full-memory lock via BP1/BP0 bits - isolates critical calibration data from firmware update routines.
Schmitt trigger inputs	On all digital pins - rejects sub-10 ns noise pulses and ensures reliable operation in electrically noisy automotive environments.
Hold mode	Zero-cycle resume after HOLD deassertion - preserves exact bit position in multi-byte transfers during host context switches.

Applications

Automotive Body Control Unit

Industrial PLC Configuration Storage

Use Scenario: Storing seat position presets, mirror angles, and lighting profiles in vehicles with ambient temperatures up to 105 °C.

IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed via SPI during MCU boot and runtime reconfiguration.

Use Value: 50-year data retention at 105 °C ensures lifetime calibration integrity without periodic refresh or backup power.

Use Scenario: Holding I/O mapping tables, PID tuning parameters, and safety thresholds in programmable logic controllers operating in factory-floor enclosures.

IC Role / Device Role / Timing Role: Secure parameter repository with hardware write-lock (W pin) preventing accidental overwrites during firmware updates.

Use Value: Dual-layer protection (BP bits + SRWD/W pin) guarantees configuration persistence across 100k+ power cycles.

Medical Infusion Pump Calibration

Smart Energy Meter Firmware Patching

Use Scenario: Retaining flow-rate calibration coefficients and dose history logs in battery-powered portable infusion devices certified to IEC 60601-1.

IC Role / Device Role / Timing Role: Safety-critical data store accessed only during supervised maintenance mode with ECC-verified reads.

Use Value: Embedded ECC x 1 detects and corrects single-bit errors - eliminating need for external CRC checks in Class II medical firmware.

Use Scenario: Applying field-upgradable firmware patches to metrology ICs in utility-grade smart meters exposed to wide thermal cycling (−25 to +70 °C).

IC Role / Device Role / Timing Role: Atomic page-write buffer for verified patch images, with WIP flag enabling precise timeout management.

Use Value: ≤4 ms page write time allows sub-10 ms patch commit - meeting ANSI C12.22 security handshake timing constraints.

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
AT25160B-SSHL-B	16 Kbit SPI EEPROM; 5.5 V max V_CC; no embedded ECC; 1 million write cycles at 85 °C.	Lacks AEC-Q100 qualification and ECC - unsuitable for automotive or medical safety-critical use.	Select only for cost-sensitive industrial controls where ECC and extended temp are not required.
BR24G16FJ-3GE2	16 Kbit I²C EEPROM; 1.7–5.5 V; 1 million write cycles at 85 °C; no Identification Page or Hold pin.	I²C interface limits speed to 1 MHz; missing HOLD and ID page reduces suitability for real-time firmware update scenarios.	Prefer only when system already uses I²C bus and SPI resource is constrained.

Compared with AT25160B-SSHL-B and BR24G16FJ-3GE2, the M95160-DRDW8TP/K uniquely combines AEC-Q100 Grade 2, embedded ECC, 105 °C operation, and a lockable Identification Page - making it the sole choice for automotive and safety-certified embedded systems requiring guaranteed data integrity over full temperature and lifetime.

Availability

M95160-DRDW8TP/K is available at Aetrix Electronics and suitable for automotive body control units, industrial PLC configuration storage, medical infusion pump calibration, and smart energy meter firmware patching requiring stable component supply across extended temperature and voltage ranges.

Supply support for M95160-DRDW8TP/K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader specializing in automotive, industrial, and power management solutions, with over 45 years of microelectronics innovation.

The M95160-DRE series targets high-reliability embedded systems requiring extended temperature operation, AEC-Q100 qualification, and robust nonvolatile storage - designed specifically for automotive subsystems and industrial control applications demanding long-term data integrity.

FAQ

What is the function of the HOLD pin on M95160-DRDW8TP/K?

The HOLD pin pauses ongoing SPI communication without deselecting the device or resetting internal state. When driven low while Serial Clock (C) is low, it places Q in high-impedance and ignores D and C transitions. Communication resumes immediately upon HOLD going high with C low - preserving exact bit position in multi-byte transfers. This enables deterministic host interrupt handling without transaction loss.

How does the Identification Page differ from main memory?

The Identification Page is a dedicated 32-byte area separate from the 2 Kbyte main array. Its first 3 bytes contain factory-programmed ST device ID (e.g., 0x20 0x16 0x00); remaining bytes are user-writable. Unlike main memory, this page supports LID (Lock ID) instruction to permanently disable further writes - making it ideal for storing immutable calibration keys or security tokens that must survive firmware updates.

Can M95160-DRDW8TP/K operate reliably at 1.7 V and 105 °C simultaneously?

Yes. The device is fully characterized for DC and AC parameters at 1.7 V and 105 °C per Table 10 and Table 11 in the datasheet. At this condition, maximum SPI clock is 5 MHz, write cycle time remains ≤4 ms, and data retention exceeds 50 years. This dual extreme rating is validated per AEC-Q100 Grade 2 stress testing, including 1000-hour high-temp operating life (HTOL) and temperature cycling.

What protection mechanisms prevent unintended writes to the Status Register?

Two independent mechanisms protect the Status Register: (1) Software control via SRWD bit - when set to 1, the W pin state determines writability; (2) Hardware control via W pin - when SRWD = 1 and W = low, WRSR is discarded and BP1/BP0 become frozen. This dual-layer scheme ensures that critical protection settings cannot be altered by software bugs alone - requiring coordinated hardware and firmware action to modify.

M95160-DRDW8TP/K Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: -

Package/Case:: 8-TSSOP (0.173", 4.40mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Memory Type:: Non-Volatile

Memory Format:: EEPROM

Technology:: EEPROM

Memory Size:: 16Kbit

Memory Organization:: 2K x 8

Memory Interface:: SPI

Clock Frequency:: 20 MHz

Write Cycle Time - Word, Page:: 4ms

Access Time:: -

Voltage - Supply:: 1.8V ~ 5.5V

Operating Temperature:: -40°C ~ 105°C (TA)

Grade:: Automotive

Qualification:: AEC-Q100

Mounting Type:: Surface Mount

Supplier Device Package:: 8-TSSOP

M95160-DRDW8TP/K FAQ

1.How can I place an order for M95160-DRDW8TP/K through Aetrix?

Please submit a Request for Quotation (RFQ) for M95160-DRDW8TP/K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for M95160-DRDW8TP/K reliable?

The price and inventory of M95160-DRDW8TP/K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95160-DRDW8TP/K is usually 5 days.

3.What payment methods are accepted for M95160-DRDW8TP/K?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95160-DRDW8TP/K transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for M95160-DRDW8TP/K?

M95160-DRDW8TP/K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your M95160-DRDW8TP/K order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for M95160-DRDW8TP/K?

For technical support, including M95160-DRDW8TP/K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95160-DRDW8TP/K requirements.

6.How does Aetrix verify that M95160-DRDW8TP/K is sourced from the original manufacturer or authorized distributors?

All M95160-DRDW8TP/K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95160-DRDW8TP/K meets industry standards.

7.What is the process for return or replacement of M95160-DRDW8TP/K?

All M95160-DRDW8TP/K units undergo pre-shipment inspection (PSI). If there is an issue with M95160-DRDW8TP/K, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The M95160-DRDW8TP/K part is unused and in its original packaging.

Return procedure for M95160-DRDW8TP/K:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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