STMicroelectronics M95160-DRMF3TG/K
- Part No.:
- M95160-DRMF3TG/K
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
M95160-DRMF3TG/K.pdf
- Description:
- IC EEPROM 16KBIT SPI 20MHZ 8MLP
- Quantity:
- Payment:

- Shipping:

Inventory:3,166
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Product details
Overview
M95160-DRMF3TG/K from STMicroelectronics is an AEC-Q100 Grade 0 qualified 16-Kbit serial SPI EEPROM with 32-byte page size, 20 MHz clock support, and extended temperature operation up to +145 °C - deployed in automotive powertrain control units for storing calibration data and fault logs.
For engineers reviewing the M95160-DRMF3TG/K datasheet, M95160-DRMF3TG/K pinout, M95160-DRMF3TG/K application, or M95160-DRMF3TG/K equivalent, key selection criteria include high-temperature endurance (145 °C), hardware/software write protection granularity, identification page lockability, and ECOPACK2-compliant DFN8 package compatibility with automated SMT assembly.
Technical Context
This device implements a true EEPROM array organized as 64 pages × 32 bytes (2048 × 8 bits), with embedded ECC logic correcting single-bit errors and improving data integrity in harsh automotive environments. It supports two SPI modes (CPOL=0/CPHA=0 and CPOL=1/CPHA=1) and uses edge- and level-sensitive chip select for robust command synchronization after power-up.
The status register includes WIP (write-in-progress), WEL (write-enable latch), BP0/BP1 (block protect), and SRWD (status register write disable) bits - enabling quarter-block software protection and hardware-based full-array lock via the W pin. The dedicated 32-byte identification page supports ST device ID readout and application-specific parameter storage with permanent read-only locking via LID instruction.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 16 Kbit (2048 × 8 bits), organized as 64 pages of 32 bytes - enables efficient firmware patch storage and modular configuration updates. |
| Interface | SPI-compatible, up to 20 MHz - allows high-speed parameter loading without CPU overhead in real-time engine control systems. |
| Operating temperature | −40 °C to +145 °C (Grade 0) - certified for under-hood applications including turbocharger ECU and transmission control modules. |
| Write endurance | ≥400,000 cycles at 145 °C - ensures reliable recalibration logging over full vehicle lifetime in high-thermal-stress zones. |
| Data retention | >50 years at 125 °C - guarantees long-term validity of safety-critical calibration maps without refresh cycles. |
| Supply voltage | 1.7 V to 5.5 V - interoperable with 3.3 V and 5 V automotive microcontrollers and supports brown-out tolerant operation. |
| Package | WFDFPN8 (2 × 3 mm, 0.5 mm pitch, ECOPACK2) - enables compact, thermally efficient PCB layout in space-constrained modules. |
Pinout & Package
WFDFPN8 (2 × 3 mm, 0.5 mm pitch, 8-terminal, exposed pad) - RoHS-compliant, thermally enhanced ECOPACK2 package optimized for automotive reflow profiles and mechanical shock resistance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| C | Serial clock input | Synchronizes all SPI transfers; latches input on rising edge, outputs data on falling edge - compatible with standard MCU SPI peripherals. |
| D | Serial data input | Receives instructions, addresses, and write data (MSB first); high-impedance when deselected - prevents bus contention during multi-device sharing. |
| Q | Serial data output | Drives read data (MSB first) during active READ/RDSR/RDID; enters high-Z when S is high or HOLD is asserted - enables clean bus arbitration. |
| S | Chip select input | Edge- and level-sensitive enable; requires falling edge post-power-up to initiate commands - eliminates spurious writes during power ramp. |
| HOLD | Communication pause control | Halts ongoing SPI transfer without resetting internal state; requires C low to activate - supports time-critical interrupt handling in real-time ECUs. |
| W | Hardware write protect | Locks status register when SRWD = 1 and W = low - provides tamper-resistant protection for critical calibration parameters. |
| VCC | Power supply | 1.7–5.5 V operation with ICC1 standby current ≤1 μA - minimizes quiescent power in always-on vehicle networks. |
| VSS | Ground reference | Common return for all signals and VCC; decoupling recommended within 3 mm of VCC pin - ensures noise immunity in noisy automotive harness environments. |
Key Features
| Feature | Design Value |
|---|---|
| Embedded ECC logic | Corrects single-bit errors in memory array - maintains functional safety compliance (ISO 26262 ASIL-B) without external error-checking overhead. |
| 32-byte lockable ID page | Stores ST device ID (0x20, 0x00, 0x0B) and user parameters; permanently locked via LID instruction - enables secure traceability and anti-cloning in Tier-1 production. |
| Quarter-block software protection | BP1/BP0 bits configure protected address ranges (0600h–07FFh, 0400h–07FFh, or full array) - allows selective firmware update regions while preserving calibration constants. |
| Schmitt trigger inputs | Input hysteresis ≥0.3 V on C, D, S, HOLD, W - rejects EMI-induced glitches on long PCB traces in 12 V battery environments. |
| Enhanced ESD/latch-up | HBM ESD rating ≥4000 V - withstands electrostatic discharge during manual handling and service operations in manufacturing and repair facilities. |
Applications
| Engine Control Unit (ECU) | Advanced Driver Assistance Systems (ADAS) Camera Module |
|---|---|
|
Use Scenario: Storing adaptive ignition timing maps and misfire history across thermal cycles. IC Role / Device Role / Timing Role: Nonvolatile parameter storage with guaranteed data retention >50 years at 125 °C and write endurance >400k cycles at 145 °C. Use Value: Eliminates need for external backup capacitors or refresh routines - reduces BOM count and improves ASIL-B diagnostic coverage. |
Use Scenario: Holding lens calibration coefficients and image sensor gain tables updated during factory alignment. IC Role / Device Role / Timing Role: Secure, lockable ID page stores ST device code and calibrated parameters; LID instruction enforces read-only access post-configuration. Use Value: Prevents unauthorized modification of optical calibration data - satisfies OEM cybersecurity requirements for vision-based ADAS. |
| Electric Power Steering (EPS) Controller | Onboard Charger (OBC) for EVs |
|
Use Scenario: Recording torque sensor zero-offset drift compensation values during vehicle lifetime. IC Role / Device Role / Timing Role: Hardware write protection (W pin + SRWD) blocks accidental overwrites during CAN-triggered diagnostics or firmware updates. Use Value: Ensures steering assist remains safe and predictable even after multiple software revisions - meets ISO 26262 functional safety goals. |
Use Scenario: Saving grid-voltage adaptation settings and thermal derating thresholds across charge cycles. IC Role / Device Role / Timing Role: 1.7–5.5 V supply range interfaces directly with 3.3 V MCU and 5 V isolated power rails; fast 4 ms page write enables real-time parameter capture during AC/DC transitions. Use Value: Supports dynamic thermal management without interrupting charging sessions - improves OBC reliability and warranty cost control. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25DF041A-MAHN-T | 4-Mbit SPI Flash (not EEPROM); no built-in ECC; max temp +105 °C; lacks ID page and HOLD pin. | Requires external wear-leveling and error correction firmware; unsuitable for ASIL-B calibration storage. | Select only for non-safety firmware storage where cost-per-bit outweighs reliability requirements. |
| BR24G16FJ-WE2 | I²C interface (not SPI); 16-Kbit EEPROM; AEC-Q100 Grade 2 (−40 °C to +105 °C); no identification page or HOLD function. | Limited to lower-temperature modules (e.g., infotainment); incompatible with SPI-based ECU architectures. | Use only in I²C-based designs with Grade 2 thermal requirements and no need for hold-mode interrupt handling. |
Compared with AT25DF041A-MAHN-T and BR24G16FJ-WE2, M95160-DRMF3TG/K uniquely delivers Grade 0 temperature rating, SPI-native HOLD functionality for deterministic interrupt response, and lockable ID page - making it the only option qualified for safety-critical, high-thermal automotive EEPROM use cases.
Availability
M95160-DRMF3TG/K is available at Aetrix Electronics and suitable for engine control units, ADAS camera modules, electric power steering systems, and onboard chargers requiring stable component supply across extended automotive lifecycles.
Supply support for M95160-DRMF3TG/K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader specializing in automotive, industrial, and power management solutions, with over 40 years of automotive qualification expertise and 10+ billion automotive ICs shipped.
This device belongs to ST's AEC-Q100 Grade 0 serial EEPROM product line, engineered specifically for mission-critical nonvolatile storage in extreme-temperature automotive subsystems where data integrity, security, and long-term reliability are mandatory.
FAQ
What is the maximum clock frequency supported by M95160-DRMF3TG/K?
The device supports SPI clock frequencies up to 20 MHz across its full operating temperature range (−40 °C to +145 °C), verified per DS9286 Rev 8 Section 3.2. This enables sub-millisecond parameter reads in real-time control loops without CPU polling overhead.
How does the identification page differ from main memory, and can it be rewritten?
The 32-byte identification page resides separately from the main 16-Kbit array and contains pre-programmed ST device ID (0x20, 0x00, 0x0B) plus user-writable space. Once locked via the LID instruction, it becomes permanently read-only - no erase or rewrite is possible, ensuring immutable traceability.
What protection mechanisms prevent unintended writes during power transients?
Three layers act in concert: (1) edge-sensitive chip select requiring a falling edge after power-up, (2) WREN instruction prerequisite for all write commands, and (3) hardware write protection via W pin + SRWD bit. These ensure no command executes unless explicitly enabled and validated.
Is the WFDFPN8 package compatible with standard automotive reflow profiles?
Yes - the WFDFPN8 (ECOPACK2) package is qualified for lead-free reflow per J-STD-020, with peak temperature tolerance up to 260 °C and moisture sensitivity level (MSL) 3. Its 2 × 3 mm footprint and exposed thermal pad support reliable solder joint formation in high-vibration automotive assemblies.
M95160-DRMF3TG/K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 16Kbit
- Memory Organization:
- 2K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 4ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MLP (2x3)
M95160-DRMF3TG/K FAQ
1.How can I place an order for M95160-DRMF3TG/K through Aetrix?
Please submit a Request for Quotation (RFQ) for M95160-DRMF3TG/K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95160-DRMF3TG/K reliable?
The price and inventory of M95160-DRMF3TG/K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95160-DRMF3TG/K is usually 5 days.
3.What payment methods are accepted for M95160-DRMF3TG/K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95160-DRMF3TG/K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95160-DRMF3TG/K?
M95160-DRMF3TG/K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95160-DRMF3TG/K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95160-DRMF3TG/K?
For technical support, including M95160-DRMF3TG/K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95160-DRMF3TG/K requirements.
6.How does Aetrix verify that M95160-DRMF3TG/K is sourced from the original manufacturer or authorized distributors?
All M95160-DRMF3TG/K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95160-DRMF3TG/K meets industry standards.
7.What is the process for return or replacement of M95160-DRMF3TG/K?
All M95160-DRMF3TG/K units undergo pre-shipment inspection (PSI). If there is an issue with M95160-DRMF3TG/K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95160-DRMF3TG/K part is unused and in its original packaging.
Return procedure for M95160-DRMF3TG/K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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