STMicroelectronics M95160-RDW6TP

Overview

M95160-RDW6TP from STMicroelectronics is a 16-Kbit serial SPI bus EEPROM organized as 2048 × 8 bits, operating from 1.8 V to 5.5 V supply and supporting 20 MHz clock frequency. It features 32-byte page write capability with ≤5 ms latency, quarter/half/whole array write protection, and >4 million write cycles. It is used in industrial control systems for parameter storage and calibration data retention.

For engineers reviewing the M95160-RDW6TP datasheet, M95160-RDW6TP pinout, M95160-RDW6TP application, or M95160-RDW6TP equivalent, key selection criteria include its 1.8 V minimum VCC, ECOPACK2® TSSOP8 package, SPI mode compatibility (CPOL=0/1, CPHA=0/1), and identification page lockability for secure configuration storage.

Technical Context

The M95160-RDW6TP implements a standard SPI interface with four active control signals (S, C, D, Q) plus HOLD and W inputs, supporting both CPOL=0/CPHA=0 and CPOL=1/CPHA=1 modes. Its internal architecture includes an address register, page decoder, status register (with BP1/BP0 bits), and dedicated identification page memory block.

Write operations are controlled via WREN/WRSR instructions and validated by WIP bit polling; read operations support byte/page access and status register interrogation. The device enters Standby Power mode when S is high and maintains data integrity across -40°C to +85°C ambient temperature range with >200-year retention.

Key Specifications

Pinout & Package

Package: TSSOP8 (DW), 3 mm × 4.4 mm, 0.5 mm pitch, ECOPACK2® RoHS-compliant surface-mount package.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Compared with AT25160B-SSHL-T and BR24G16FJ-3GE2, the M95160-RDW6TP uniquely combines 20 MHz SPI speed, 1.8 V operation, and hardware-lockable identification page-making it optimal for secure, high-throughput embedded configuration storage where bus arbitration and data integrity are critical.

Availability

M95160-RDW6TP is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostics equipment, smart energy meters, and automotive body control modules requiring stable component supply across extended product lifecycles.

Supply support for M95160-RDW6TP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader specializing in microcontrollers, power management, and nonvolatile memory solutions for industrial, automotive, and consumer applications.

The M95160-RDW6TP belongs to ST's serial EEPROM product line, designed specifically for robust, low-voltage SPI-based configuration storage in space-constrained and thermally demanding embedded systems.

FAQ

What is the function of the HOLD pin on M95160-RDW6TP?

The HOLD pin pauses ongoing SPI communication without deselecting the device. When asserted low while Chip Select (S) is active, it places Serial Data Output (Q) in high-impedance state and ignores Serial Clock (C) and Serial Data Input (D). This enables bus arbitration in multi-master systems or allows the host MCU to service higher-priority interrupts mid-transfer without losing synchronization.

How does write protection work on M95160-RDW6TP?

Write protection is controlled by two bits (BP1, BP0) in the Status Register and the external W pin state. BP1/BP0 configure protection for quarter, half, or whole memory array; the W pin must be held stable (high or low) during write operations. Protection remains active even after power cycling, and the identification page can be permanently locked via dedicated Lock ID instruction.

Can M95160-RDW6TP operate with a 1.8 V microcontroller's SPI interface?

Yes. The M95160-RDW6TP supports 1.8 V to 5.5 V VCC and has VIH/VIL thresholds defined relative to VCC, enabling direct interface with 1.8 V logic families. Its 20 MHz clock tolerance and SPI mode compatibility (CPOL=0/1, CPHA=0/1) ensure reliable communication with common ARM Cortex-M and RISC-V microcontrollers operating at 1.8 V I/O levels.

What distinguishes the Identification Page from regular memory pages?

The Identification Page is a dedicated 32-byte memory block accessible only via READ ID/WRITE ID instructions. Unlike main array pages, it supports permanent lock functionality: once locked via Lock ID command, it becomes read-only for life. This makes it ideal for storing immutable calibration data, device serial numbers, or cryptographic keys that must survive field updates and prevent tampering.