STMicroelectronics M95160-RMN6TP

Overview

M95160-RMN6TP from STMicroelectronics is a 16-Kbit serial SPI bus EEPROM organized as 2048 × 8 bits, operating from 1.8 V to 5.5 V supply and supporting 20 MHz clock frequency. It features 32-byte page write capability with ≤5 ms write time, quarter/half/whole array write protection, and >4 million write cycles. It is used in industrial control systems for parameter storage and calibration data retention.

For engineers reviewing the M95160-RMN6TP datasheet, M95160-RMN6TP pinout, M95160-RMN6TP application, or M95160-RMN6TP equivalent, key selection criteria include its 1.8 V minimum VCC, ECOPACK2® SO8N package, SPI mode compatibility (CPOL=0/1, CPHA=0/1), and identification page lockability for secure configuration storage.

Technical Context

The device implements a standard SPI interface with four active signals: Chip Select (S), Serial Clock (C), Serial Data Input (D), and Serial Data Output (Q), plus dedicated HOLD and Write Protect (W) control inputs. It supports dual SPI modes (CPOL=0, CPHA=0 and CPOL=1, CPHA=1) with data latched on rising C edge and output shifted on falling C edge.

Internal architecture includes an 8-bit status register with BP1/BP0 bits controlling write-protect granularity, WEL bit enabling writes, and SRWD bit locking status register configuration. The memory array comprises 2048 bytes across 64 pages of 32 bytes each, with optional identification page support (not implemented in M95160-R variant per datasheet Section 1).

Key Specifications

Pinout & Package

Package: SO8N (ECOPACK2®), 8-lead plastic small outline, 150 mil body width, lead pitch 1.27 mm. Pin-1 marked by notch or dot; pin numbering counterclockwise from top-left when marking side faces up.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Compared with AT25160B-SSHL-T and BR24G16FJ-3GE2, M95160-RMN6TP uniquely combines 1.8 V operation, 20 MHz speed, HOLD functionality, and ECOPACK2® SO8N packaging-making it optimal for industrial controllers needing robust, high-throughput, and pin-compatible EEPROM replacement.

Availability

M95160-RMN6TP is available at Aetrix Electronics and suitable for industrial PLCs, smart energy meters, automotive body control modules, and medical infusion pumps requiring stable component supply across extended temperature and voltage ranges.

Supply support for M95160-RMN6TP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and memory products for industrial, automotive, and consumer markets.

M95160-RMN6TP belongs to ST's serial EEPROM product line, engineered for reliable, low-power, and secure nonvolatile data storage in harsh environments where long-term data integrity and flexible write protection are mandatory.

FAQ

What is the maximum clock frequency supported by M95160-RMN6TP?

The M95160-RMN6TP supports a maximum SPI clock frequency of 20 MHz across its full operating voltage range (1.8 V to 5.5 V) and temperature range (−40 °C to +85 °C), as specified in Table 18 of the official datasheet (DocID022580 Rev 8). This enables high-speed byte and page reads/writes without timing margin violations.

Does M95160-RMN6TP include an identification page?

No. The identification page (32-byte secure area with permanent lock capability) is exclusive to the M95160-D series variants (e.g., M95160-DF). The M95160-RMN6TP is part of the M95160-R family, which omits this feature per Section 1 of the datasheet: "The M95160-D offers an additional page… The M95160-R does not implement the identification page."

How is write protection configured on M95160-RMN6TP?

Write protection is controlled via the Status Register's BP1 and BP0 bits, which define protected block size (quarter, half, or whole memory array). These bits are set using the Write Status Register (WRSR) instruction after issuing Write Enable (WREN). The W pin provides hardware-level freeze of the current BP setting during active writes.

What package type is used for M95160-RMN6TP?

M95160-RMN6TP uses the SO8N package: an 8-lead plastic small outline with 150 mil body width, 1.27 mm lead pitch, and ECOPACK2® environmental compliance. Pin-1 is identified by a notch or dot; mechanical dimensions and footprint recommendations are detailed in Section 10.1 of the datasheet (Table 21, Figure 23–24).