STMicroelectronics M95256-RMC6TG

Overview

M95256-RMC6TG from STMicroelectronics is a 256-Kbit serial SPI EEPROM organized as 32,768 × 8 bits, designed for nonvolatile data storage in microcontroller-based systems requiring byte- and page-level writes, hardware/software write protection, and operation down to 1.8 V. It supports 20 MHz clock speed, offers 64-byte page size, includes an additional lockable 64-byte Identification page, and delivers >4 million write cycles with >200-year data retention.

For engineers reviewing the M95256-RMC6TG datasheet, M95256-RMC6TG pinout, M95256-RMC6TG application, or M95256-RMC6TG equivalent, key selection criteria include supply voltage range (1.8–5.5 V), SPI mode compatibility (CPOL/CPHA = 0/0 or 1/1), quarter/half/whole-array write protection, HOLD functionality for transaction pausing, and ECOPACK2-compliant TSSOP8 packaging.

Technical Context

The device implements a standard SPI interface with dedicated S (chip select), C (clock), D (data in), Q (data out), W (write protect), and HOLD pins. It operates in two power modes-Active (S low) and Standby (S high, no write in progress)-with ICC1 standby current ≤1 μA at 5.5 V.

Internal architecture includes a status register with WIP, WEL, BP1/BP0, and SRWD bits enabling flexible software- and hardware-based memory protection. The Identification page (available only on -DF/-DR/-DW variants) is absent in M95256-R, confirming this part uses standard 32 Kbyte array without custom ID page functionality.

Key Specifications

Pinout & Package

Package: TSSOP8 (169 mil width), ECOPACK2-compliant, surface-mount, 8-pin thin shrink small outline package with exposed pad not present.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial SPI EEPROM applications.

Compared with AT25SF041-SSHD-B and BR25L256FJ-WE2, M95256-RMC6TG uniquely balances 1.8 V operation, HOLD capability, ECOPACK2 packaging, and proven 4M-cycle endurance-making it optimal for resource-constrained, interrupt-driven embedded systems requiring deterministic EEPROM interaction.

Availability

M95256-RMC6TG is available at Aetrix Electronics and suitable for industrial sensor calibration, smart meter firmware storage, medical device configuration, and automotive body control module applications requiring stable component supply, long-term lifecycle support, and ECOPACK2 environmental compliance.

Supply support for M95256-RMC6TG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, delivering silicon solutions for automotive, industrial, and consumer markets with emphasis on energy efficiency, reliability, and embedded intelligence.

M95256-RMC6TG belongs to ST's serial EEPROM product line, engineered specifically for robust, low-voltage, SPI-based nonvolatile storage in space- and power-constrained embedded systems where data integrity and long-term retention are mission-critical.

FAQ

What is the maximum SPI clock frequency supported by M95256-RMC6TG?

The device supports up to 20 MHz SPI clock frequency across its full operating voltage range (1.8–5.5 V) and temperature range (−40 °C to +85 °C). This is specified in AC characteristics Table 13 of DS4712 Rev 22, with tCH and tCL minimum pulse widths of 25 ns each, enabling high-throughput configuration reads and firmware updates without timing margin concerns.

Does M95256-RMC6TG include an Identification page?

No. The Identification page (64 bytes, lockable via LID instruction) is exclusive to M95256-DF, M95256-DR, and M95256-DW variants. M95256-RMC6TG is the standard R-version and contains only the main 32 Kbyte memory array with no dedicated ID page or RDID/WRID/LID instructions.

How does the HOLD pin behave during an active write cycle?

HOLD is ignored during internal write cycles (tW ≤5 ms); the device completes the write regardless of HOLD state. HOLD only affects ongoing SPI transactions - it pauses instruction/address/data transfer but cannot interrupt or abort an in-progress byte or page write already initiated by a WRITE command.

Can M95256-RMC6TG be used with a 3.3 V microcontroller SPI interface without level shifting?

Yes. With VIH(min) = 0.7×VCC and VIL(max) = 0.3×VCC, and VCC operating range of 1.8–5.5 V, the device accepts 3.3 V logic levels directly when powered at 3.3 V or higher. At 1.8 V VCC, external level translation is required for reliable 3.3 V MCU interfacing due to insufficient VIH margin.