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STMicroelectronics M95320-DRDW3TP/K
- Part No.:
- M95320-DRDW3TP/K
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
M95320-DRDW3TP/K.pdf
- Description:
- IC EEPROM 32KBIT SPI 8TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,773
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Product details
Overview
M95320-DRDW3TP/K from STMicroelectronics is an AEC-Q100 Grade 0 automotive EEPROM with 32-Kbit (4-Kbyte) SPI interface, 1.7–5.5 V supply range, and extended temperature operation up to +145°C. It features 32-byte page write, 4 ms typical write cycle time, Schmitt-trigger inputs, and dual-level write protection (software quarter-block + hardware full-array).
For engineers reviewing the M95320-DRDW3TP/K datasheet, M95320-DRDW3TP/K pinout, M95320-DRDW3TP/K application, or M95320-DRDW3TP/K equivalent, this device serves as a high-reliability nonvolatile memory for engine control units, battery management systems, and ADAS sensor modules requiring data logging under extreme thermal stress.
Technical Context
The M95320-DRDW3TP/K implements a true EEPROM array organized as 128 pages × 32 bytes (4096 × 8 bits), with embedded ECC logic for enhanced data integrity. Its SPI interface supports CPOL=0/CPHA=0 and CPOL=1/CPHA=1 modes, latching input on clock rising edge and outputting data on falling edge.
It integrates a dedicated 32-byte identification page-pre-programmed with ST's device ID (0x20, 0x00, 0x0C)-that supports application-specific parameter storage and permanent read-only lock via LID instruction. Write protection is enforced through both status register BP0/BP1 bits and hardware W pin control of SRWD bit.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 32-Kbit (4-Kbyte), byte-alterable, organized as 128 × 32-byte pages |
| Interface | SPI-compatible, up to 20 MHz clock, supports CPOL/CPHA modes 00 and 11 |
| Write cycle time | Typical 3.2 ms per byte/page; self-timed internal erase-then-program sequence |
| Endurance | ≥4 million cycles at 25°C; ≥0.4 million at 145°C - validated for automotive life-cycle stress |
| Data retention | ≥100 years at 25°C; ≥50 years at 125°C - meets ASIL-B functional safety data persistence requirements |
| Operating temperature | −40°C to +145°C (Grade 0 AEC-Q100), qualified for under-hood and powertrain applications |
| Supply voltage | 1.7 V to 5.5 V - enables direct interfacing with 1.8 V, 3.3 V, and 5 V microcontrollers |
Pinout & Package
Package: WFDFPN8 (2 mm × 3 mm, ECOPACK2-compliant, 0.5 mm pitch, exposed pad).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| C | Serial clock input | Synchronizes all SPI transfers; data latched on rising edge, output shifted on falling edge |
| D | Serial data input | Receives instructions, addresses, and write data (MSB first); high-impedance when deselected |
| Q | Serial data output | Drives read data (MSB first); enters high-Z state when S is high or HOLD is active |
| S | Chip select input | Edge- and level-sensitive; falling edge initiates command decoding; must be high before first use |
| HOLD | Communication pause control | Halts ongoing SPI transfer without deselecting device; requires C low to activate/deactivate |
| W | Hardware write protect | Controls SRWD bit effect: when low, locks status register if SRWD = 1 - prevents accidental BP/WEL changes |
| VCC | Power supply | 1.7–5.5 V operating range; decoupling capacitor required near pin for noise immunity |
| VSS | Ground reference | Common return for all signals and VCC; must be low-impedance connection to minimize EMI |
Key Features
| Feature | Design Value |
|---|---|
| Embedded ECC logic | Corrects single-bit errors and detects multi-bit errors in real time during read operations |
| Identification page lock (LID) | Permanently disables writes to 32-byte ID page after execution - ensures calibration or serial data immutability |
| Dual write protection | Software-configurable quarter/half/full block lock (BP0/BP1) + hardware W-pin gated SRWD enforcement |
| Schmitt-trigger inputs | Filters noise on C, D, S, HOLD, W pins - eliminates false triggering in high-EMI engine environments |
| ECOPACK2 package | Halogen-free, RoHS-compliant WFDFPN8 with wettable flanks for automated optical solder inspection |
Applications
| Engine Control Unit (ECU) | Battery Management System (BMS) |
|---|---|
|
Use Scenario: Storing adaptive fuel trim tables, knock sensor calibration offsets, and fault code history across ignition cycles. IC Role / Device Role / Timing Role: Nonvolatile configuration storage with guaranteed data integrity at 145°C under hood ambient. Use Value: Enables zero-latency recall of learned parameters after cold start; ECC prevents silent corruption from thermal cycling-induced bit flips. |
Use Scenario: Logging cell voltage imbalances, thermal runaway event timestamps, and SOC/SOH history in traction battery packs. IC Role / Device Role / Timing Role: High-endurance EEPROM for safety-critical runtime data capture where flash wear-out is unacceptable. Use Value: 0.4M write cycles at 145°C ensures >10-year field reliability in EV battery packs operating continuously at elevated temperatures. |
| ADAS Camera Module | Electric Power Steering (EPS) |
|
Use Scenario: Storing lens distortion coefficients, ISP firmware patch metadata, and camera alignment parameters calibrated at factory. IC Role / Device Role / Timing Role: Secure, lockable ID page stores immutable calibration data; hardware W pin prevents field overwrite. Use Value: LID instruction guarantees optical calibration remains unaltered post-deployment - critical for ISO 26262 ASIL-B compliance. |
Use Scenario: Recording torque sensor zero-point drift compensation values and motor phase error logs during steering actuation. IC Role / Device Role / Timing Role: Fast 3.2 ms page write enables real-time logging of transient torque events without MCU intervention delay. Use Value: Sub-4 ms write latency allows capture of <100 ms mechanical transients - essential for EPS functional safety diagnostics. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25DF041A-SSH-T | 4-Mbit NOR Flash (not EEPROM); lacks built-in ECC; max temp +105°C only | Requires external wear-leveling and error correction firmware; unsuitable for ASIL-B data retention at >125°C | Select only for cost-sensitive non-safety applications where endurance >1M cycles is not required |
| BR24G32FJ-3GE2 | I²C interface (400 kHz), 32-Kbit, AEC-Q100 Grade 1 (−40°C to +125°C); no HOLD pin or ID page | Lacks hold functionality for interrupt-safe logging; no permanent lockable ID page for calibration security | Prefer for space-constrained I²C designs where 145°C operation and ID page locking are not mandatory |
Compared with AT25DF041A-SSH-T and BR24G32FJ-3GE2, the M95320-DRDW3TP/K uniquely delivers Grade 0 AEC-Q100 qualification, embedded ECC, 145°C operation, and hardware-lockable ID page - making it the only choice for ASIL-B-compliant powertrain and ADAS data storage.
Availability
M95320-DRDW3TP/K is available at Aetrix Electronics and suitable for engine control units, battery management systems, ADAS camera modules, and electric power steering systems requiring stable component supply across automotive production lifecycles.
Supply support for M95320-DRDW3TP/K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in automotive-grade, industrial, and power-efficient ICs with strong IP in nonvolatile memory and embedded control.
The M95320 series belongs to ST's automotive EEPROM product line, engineered specifically for mission-critical data logging in powertrain, chassis, and ADAS systems where extended temperature resilience and AEC-Q100 Grade 0 reliability are mandatory.
FAQ
What is the function of the HOLD pin, and how does it differ from chip deselect?
The HOLD pin pauses ongoing SPI communication without resetting the internal address counter or clock state - allowing the host MCU to service higher-priority interrupts and resume exactly where it left off. Unlike chip deselect (S high), which forces Q into high-Z and discards partial commands, HOLD maintains bus ownership and preserves transaction context, enabling deterministic real-time logging in safety-critical automotive firmware.
How does the identification page differ from main memory, and what happens after LID execution?
The identification page is a dedicated 32-byte region separate from main memory, preloaded with ST's device ID (0x20, 0x00, 0x0C) and reserved for application-specific data. After executing the LID (Lock ID) instruction, all future WRITE and WRID commands to this page are rejected - even if W is high and SRWD=0 - ensuring calibration constants or serial numbers remain permanently immutable for functional safety traceability.
Can the M95320-DRDW3TP/K operate reliably at 1.7 V while running at 20 MHz?
Yes - the device is fully specified for 20 MHz SPI operation across its entire 1.7–5.5 V supply range. At 1.7 V, tCLQV (clock-to-output delay) increases to 120 ns (max), and tDIS (deselect time) extends to 250 ns, but all AC timing parameters remain within spec. This enables direct interfacing with 1.8 V MCUs without level-shifting, reducing BOM count and PCB area in compact automotive modules.
What failure modes does the embedded ECC logic detect and correct?
The ECC logic implements Hamming-code-based single-bit error correction and double-bit error detection on every read access. It corrects soft errors caused by alpha particles or thermal neutrons, and detects hard errors from marginal programming or oxide degradation. Corrected data is returned to the host transparently; detected double-bit errors trigger a status flag (not interrupt) - enabling firmware to initiate data recovery or fail-safe shutdown per ISO 26262 diagnostic requirements.
M95320-DRDW3TP/K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 32Kbit
- Memory Organization:
- 4K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 4ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
M95320-DRDW3TP/K FAQ
1.How can I place an order for M95320-DRDW3TP/K through Aetrix?
Please submit a Request for Quotation (RFQ) for M95320-DRDW3TP/K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95320-DRDW3TP/K reliable?
The price and inventory of M95320-DRDW3TP/K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95320-DRDW3TP/K is usually 5 days.
3.What payment methods are accepted for M95320-DRDW3TP/K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95320-DRDW3TP/K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95320-DRDW3TP/K?
M95320-DRDW3TP/K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95320-DRDW3TP/K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95320-DRDW3TP/K?
For technical support, including M95320-DRDW3TP/K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95320-DRDW3TP/K requirements.
6.How does Aetrix verify that M95320-DRDW3TP/K is sourced from the original manufacturer or authorized distributors?
All M95320-DRDW3TP/K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95320-DRDW3TP/K meets industry standards.
7.What is the process for return or replacement of M95320-DRDW3TP/K?
All M95320-DRDW3TP/K units undergo pre-shipment inspection (PSI). If there is an issue with M95320-DRDW3TP/K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95320-DRDW3TP/K part is unused and in its original packaging.
Return procedure for M95320-DRDW3TP/K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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