STMicroelectronics M95320-DRDW6TP

Overview

M95320-DRDW6TP from STMicroelectronics is a 32-Kbit serial SPI bus EEPROM organized as 4096 × 8 bits, operating across 1.7 V to 5.5 V supply and -40°C to +85°C ambient. It supports 20 MHz clock speed, 32-byte page writes completing in ≤5 ms, and offers quarter/half/whole array write protection via status register BP1/BP0 bits. Used for firmware parameter storage in industrial control modules requiring nonvolatile configuration retention.

For engineers reviewing the M95320-DRDW6TP datasheet, M95320-DRDW6TP pinout, M95320-DRDW6TP application, or M95320-DRDW6TP equivalent, key selection criteria include verified 200-year data retention, 4 million write cycles, ECOPACK2®-compliant TSSOP8 packaging, and SPI mode compatibility (CPOL=0/CPHA=0 and CPOL=1/CPHA=1).

Technical Context

This EEPROM implements a standard SPI interface with dedicated Serial Clock (C), Serial Data Input (D), Serial Data Output (Q), Chip Select (S), Write Protect (W), and HOLD pins. It uses a nonvolatile status register with BP1/BP0 bits to configure write-protected memory blocks and SRWD bit to lock protection settings permanently.

Internal architecture includes an address register, I/O shift register, page decoder, and high-voltage generator for programming. The device supports byte and page write operations, with automatic write cycle termination signaled via WIP bit in the status register, and features built-in power-on reset (POR) to prevent spurious writes during voltage ramp-up.

Key Specifications

Pinout & Package

Package: TSSOP8 (DW), 3 mm × 4.4 mm, 0.5 mm pitch, ECOPACK2®-compliant - optimized for automated SMT assembly and thermal reliability in dense PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Compared with AT25320B-SSHL-T and BR24G32FJ-3GE2, M95320-DRDW6TP uniquely combines user-writable/lockable Identification Page, 4 million write cycles, and full 1.7 V–5.5 V operation - making it optimal for safety-critical or field-serviceable systems requiring both flexibility and permanence in parameter storage.

Availability

M95320-DRDW6TP is available at Aetrix Electronics and suitable for industrial PLCs, automotive body control modules, and smart energy meters requiring stable component supply, long-lifecycle support, and ECOPACK2®-compliant packaging.

Supply support for M95320-DRDW6TP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.

M95320-DRDW6TP belongs to ST's serial EEPROM product line, engineered specifically for reliable, low-power, SPI-based nonvolatile storage in harsh environments where data integrity and long-term retention are mission-critical.

FAQ

What is the function of the HOLD pin on M95320-DRDW6TP?

The HOLD pin pauses ongoing SPI communication without deselecting the device. When asserted low while Chip Select (S) is active, Serial Data Output (Q) enters high-impedance state and Serial Data Input (D) and Serial Clock (C) are ignored. This allows the host MCU to temporarily suspend EEPROM access-e.g., during interrupt servicing-without aborting or restarting the transaction. Recovery occurs automatically upon deassertion of HOLD.

How does write protection work on M95320-DRDW6TP?

Write protection is controlled by BP1 and BP0 bits in the nonvolatile status register, enabling quarter (1 KB), half (2 KB), or full (4 KB) memory array lock. The Write Protect (W) pin must be held stable during write operations and can be tied high or low depending on system-level protection strategy. Once SRWD bit is set, BP1/BP0 become read-only, preventing accidental reconfiguration of protected regions.

Is M95320-DRDW6TP compatible with standard SPI modes?

Yes, M95320-DRDW6TP supports two SPI modes: CPOL=0/CPHA=0 and CPOL=1/CPHA=1. In both, data is latched on the rising edge of Serial Clock (C) and output on the falling edge. The difference lies only in idle clock polarity-C remains low in mode 0 and high in mode 3-ensuring seamless integration with common microcontroller SPI peripherals without software modification.

What distinguishes the Identification Page from regular memory pages?

The Identification Page is a dedicated 32-byte area accessible only via READ ID and WRITE ID instructions (not standard READ/WRITE). It stores application-specific data like serial numbers or calibration keys and can be permanently locked to read-only mode using the Lock ID command. Unlike main array pages, it cannot be erased by bulk erase and retains its lock state across power cycles and device resets.