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STMicroelectronics M95320-DRMN6TP
- Part No.:
- M95320-DRMN6TP
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
M95320-DRMN6TP.pdf
- Description:
- IC EEPROM 32KBIT SPI 20MHZ 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:1,470
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Product details
Overview
M95320-DRMN6TP from STMicroelectronics is a 32-Kbit serial SPI bus EEPROM organized as 4096 × 8 bits, operating across 1.7 V to 5.5 V supply and -40°C to +85°C ambient. It supports 20 MHz clock speed, 32-byte page writes completing in ≤5 ms, and offers quarter/half/whole array write protection via Status Register BP1/BP0 bits. Used for firmware parameter storage in industrial control modules requiring nonvolatile configuration retention.
For engineers reviewing the M95320-DRMN6TP datasheet, M95320-DRMN6TP pinout, M95320-DRMN6TP application, or M95320-DRMN6TP equivalent, key selection criteria include verified SPI mode compatibility (CPOL=0/CPHA=0 and CPOL=1/CPHA=1), identification page lockability, 4M write cycle endurance, and ECOPACK2® SO8N package mechanical compliance.
Technical Context
This EEPROM implements a synchronous serial interface compliant with SPI protocol, using four active signals (C, D, Q, S) plus HOLD and W for flow control and hardware write protection. Internal logic includes an address register, data register, page decoder, and nonvolatile status register with BP1/BP0 bits controlling protected block size (1/4, 1/2, or full 4 Kbyte array).
It supports two SPI modes: CPOL=0/CPHA=0 and CPOL=1/CPHA=1 - both latching input on rising C edge and outputting on falling C edge. The device integrates power-on reset (POR), high-impedance tri-state outputs during HOLD or deselection, and ECC-assisted cycling for enhanced reliability in critical data logging applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 32 Kbit (4096 × 8 bits) - provides sufficient space for bootloader configuration, calibration data, and device identity storage in resource-constrained embedded systems. |
| Interface | SPI bus (CPOL=0/CPHA=0 and CPOL=1/CPHA=1) - ensures interoperability with common microcontroller SPI peripherals without custom timing adaptation. |
| Max Clock Frequency | 20 MHz - enables fast parameter read/write cycles (≤5 ms per page), reducing host MCU wait time in real-time control loops. |
| Write Endurance | 4 million cycles - supports frequent field-updatable settings in programmable logic controllers and sensor calibration systems. |
| Data Retention | 200 years at +25°C - guarantees long-term integrity of stored calibration coefficients and security keys without refresh overhead. |
| Supply Voltage Range | 1.7 V to 5.5 V - allows direct interfacing with 1.8 V, 3.3 V, and 5 V logic domains without level-shifting circuitry. |
| Operating Temperature | -40°C to +85°C - qualified for deployment in industrial automation, automotive body electronics, and outdoor metering equipment. |
Pinout & Package
Package: SO8N (ECOPACK2®), 8-lead plastic small outline, 150 mil body width, RoHS-compliant, lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (S) | Chip Select | Active-low enable signal; drives device into Active Power mode when low, places Q in high-Z when high. |
| 2 (W) | Write Protect | Hardware lock for BP1/BP0-defined memory protection zones; must be stable during WRITE/WRSR instructions. |
| 3 (VSS) | Ground Reference | Common return path for all I/O and internal logic; requires local 10–100 nF decoupling capacitor. |
| 4 (D) | Serial Data Input | Input for instructions, addresses, and write data; sampled on rising edge of C per SPI timing rules. |
| 5 (Q) | Serial Data Output | Output for read data and status register contents; changes on falling edge of C. |
| 6 (C) | Serial Clock | Master-generated timing signal; defines sampling (rising edge) and output (falling edge) points for full-duplex SPI operation. |
| 7 (HOLD) | Hold Control | Pauses ongoing SPI transaction without deselecting device; sets Q to high-Z and ignores D/C while asserted low. |
| 8 (VCC) | Power Supply | Single-supply input supporting 1.7–5.5 V; internal POR circuit prevents spurious writes during power ramp-up. |
Key Features
| Feature | Design Value |
|---|---|
| Identification Page | 32-byte dedicated page for storing sensitive parameters (e.g., MAC address, calibration offsets) that can be permanently locked to read-only mode. |
| Flexible Write Protection | Software-configurable via Status Register BP1/BP0 bits to protect 1/4, 1/2, or entire memory array - enabling secure boot code partitioning. |
| ECC-Assisted Cycling | Integrated error correction during write/erase cycles extends effective endurance and improves bit-level reliability in harsh EMI environments. |
| Enhanced ESD Protection | ≥4 kV HBM rating - reduces risk of latch-up or parametric shift during board handling and in-circuit programming. |
| Low-Power Standby Mode | 1 μA typical current draw when deselected (S high) - suitable for battery-backed IoT endpoint nodes requiring multi-year operation. |
Applications
| Industrial PLC Configuration Storage | Smart Meter Firmware Parameter Retention |
|---|---|
|
Use Scenario: Storing calibrated sensor gain/offset values and user-defined alarm thresholds in programmable logic controllers deployed in factory-floor environments. IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed via SPI during system initialization and runtime updates; operates synchronously with host MCU clock. Use Value: Enables field recalibration without firmware reflash, leveraging 4M write cycles and 200-year data retention to eliminate maintenance downtime. |
Use Scenario: Holding tariff tables, meter ID, and cryptographic keys in utility-grade electricity meters subject to temperature cycling and long service life. IC Role / Device Role / Timing Role: Secure parameter vault with lockable Identification Page; accessed during secure boot and periodic firmware validation sequences. Use Value: Prevents unauthorized modification of billing parameters using hardware write protection and permanent ID page locking capability. |
| Automotive Body Control Module Settings | Medical Diagnostic Equipment Calibration Data |
|
Use Scenario: Saving seat position presets, mirror angles, and lighting profiles in automotive BCMs where EEPROM must survive repeated ignition cycles and thermal stress. IC Role / Device Role / Timing Role: SPI-connected persistent memory mapped into MCU's peripheral address space; supports fast 20 MHz reads during vehicle startup sequence. Use Value: Delivers guaranteed -40°C to +85°C operation and 1.7 V minimum supply support for cold-cranking scenarios without brown-out resets. |
Use Scenario: Archiving sensor-specific calibration coefficients and diagnostic self-test results in portable ultrasound and ECG devices requiring FDA-grade traceability. IC Role / Device Role / Timing Role: Trusted configuration store with ECC-enabled writes; used during pre-use verification and post-measurement data logging. Use Value: Ensures clinical data integrity through 4M write cycles and ECC-assisted cycling, meeting IEC 62304 software safety requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25320B-SSHL-T (Microchip) | Same 32 Kbit SPI EEPROM but rated only to 1.8–5.5 V; lacks Identification Page and ECC cycling; max clock 20 MHz. | No permanent ID page lock; lower write endurance (1M cycles); unsuitable for secure parameter storage requiring tamper-proof locking. | Select when cost sensitivity outweighs need for ID page security and extended endurance in non-critical settings. |
| BR24T32FJ-WE2 (ROHM) | 32 Kbit SPI EEPROM with 1.7–5.5 V range and -40°C to +105°C rating; includes unique ID register but no lockable ID page. | Higher temp grade supports under-hood use, but lacks BP1/BP0 configurable protection granularity and ECC support. | Prefer for extended temperature applications where ID page locking is not required and 105°C operation is mandatory. |
Compared with AT25320B-SSHL-T and BR24T32FJ-WE2, M95320-DRMN6TP uniquely combines lockable Identification Page, ECC-assisted cycling, and fine-grained BP1/BP0 write protection - making it optimal for secure, high-reliability industrial and medical firmware storage where data integrity and long-term configurability are critical.
Availability
M95320-DRMN6TP is available at Aetrix Electronics and suitable for industrial PLCs, smart meters, automotive body control modules, and medical diagnostic equipment requiring stable component supply across extended temperature and voltage ranges.
Supply support for M95320-DRMN6TP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.
M95320-DRMN6TP belongs to ST's serial EEPROM product line, engineered specifically for robust, low-power, SPI-based nonvolatile storage in mission-critical embedded systems demanding high endurance and long-term data integrity.
FAQ
What SPI modes does M95320-DRMN6TP support?
M95320-DRMN6TP supports two SPI modes: CPOL=0/CPHA=0 and CPOL=1/CPHA=1. In both, input data is latched on the rising edge of Serial Clock (C), and output data appears on the falling edge. The difference lies in idle clock polarity - C remains low in mode 0 and high in mode 1 - allowing seamless integration with diverse MCU SPI peripherals without timing redesign.
How is write protection configured on M95320-DRMN6TP?
Write protection is controlled by BP1 and BP0 bits in the Status Register, which define protected block size as quarter, half, or full memory array. These bits are set via Write Status Register (WRSR) instruction after issuing Write Enable (WREN). The W pin provides hardware-level freeze of the protection configuration during active writes, preventing accidental override.
Does M95320-DRMN6TP include an Identification Page, and can it be locked?
Yes - M95320-DRMN6TP includes a dedicated 32-byte Identification Page accessible only via READ ID and WRITE ID instructions. This page can be permanently locked to read-only mode using the Lock ID command, preventing further writes while retaining full read access - ideal for storing immutable device identifiers or cryptographic keys.
What is the significance of ECC-assisted cycling in M95320-DRMN6TP?
ECC-assisted cycling applies error correction during write/erase operations to detect and correct bit errors before they accumulate. This extends effective write endurance beyond the rated 4 million cycles and improves long-term data reliability in electrically noisy environments - particularly valuable in industrial control and medical diagnostics where uncorrected bit flips could compromise system safety.
M95320-DRMN6TP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 32Kbit
- Memory Organization:
- 4K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
M95320-DRMN6TP FAQ
1.How can I place an order for M95320-DRMN6TP through Aetrix?
Please submit a Request for Quotation (RFQ) for M95320-DRMN6TP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95320-DRMN6TP reliable?
The price and inventory of M95320-DRMN6TP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95320-DRMN6TP is usually 5 days.
3.What payment methods are accepted for M95320-DRMN6TP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95320-DRMN6TP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95320-DRMN6TP?
M95320-DRMN6TP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95320-DRMN6TP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95320-DRMN6TP?
For technical support, including M95320-DRMN6TP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95320-DRMN6TP requirements.
6.How does Aetrix verify that M95320-DRMN6TP is sourced from the original manufacturer or authorized distributors?
All M95320-DRMN6TP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95320-DRMN6TP meets industry standards.
7.What is the process for return or replacement of M95320-DRMN6TP?
All M95320-DRMN6TP units undergo pre-shipment inspection (PSI). If there is an issue with M95320-DRMN6TP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95320-DRMN6TP part is unused and in its original packaging.
Return procedure for M95320-DRMN6TP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
M95320-DRMN6TP Tags
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