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STMicroelectronics M95320-DWDW4TP/K
- Part No.:
- M95320-DWDW4TP/K
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
M95320-DWDW4TP/K.pdf
- Description:
- IC EEPROM 32KBIT SPI 8TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,990
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Product details
Overview
M95320-DWDW4TP/K from STMicroelectronics is an AEC-Q100 Grade 0 automotive EEPROM IC with SPI interface, 32-Kbit (4-Kbyte) memory capacity, 32-byte page size, and extended temperature operation up to +145°C. It integrates an embedded ECC logic for data integrity, a lockable 32-byte identification page, and hardware/software write protection - deployed in engine control units, battery management systems, and ADAS sensor modules requiring nonvolatile storage under extreme thermal stress.
For engineers reviewing the M95320-DWDW4TP/K datasheet, M95320-DWDW4TP/K pinout, M95320-DWDW4TP/K application, or M95320-DWDW4TP/K equivalent, key selection criteria include its 20 MHz SPI clock support, 4 ms typical page write time, –40°C to +145°C operating range, and dual-level write protection (SRWD + W pin) enabling secure firmware parameter storage in safety-critical automotive subsystems.
Technical Context
The device implements a true EEPROM array organized as 128 pages × 32 bytes (4096 × 8 bits), with dedicated ECC logic correcting single-bit errors and detecting double-bit errors during read operations. Its SPI interface supports CPOL=0/CPHA=0 and CPOL=1/CPHA=1 modes, with data latched on rising C edge and output shifted on falling C edge.
It features a dual-protection architecture: software-configurable quarter-block protection via BP1/BP0 bits in the status register, and hardware-enforced full-array protection via the W pin combined with SRWD bit. The HOLD pin enables communication pause without chip deselection, preserving internal state across microcontroller interrupt latency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 32-Kbit (4-Kbyte), byte-alterable - supports individual byte updates without erasing full pages. |
| Page size | 32 bytes - enables efficient burst writes within page boundaries; exceeding triggers rollover to page start. |
| Max SPI clock | 20 MHz - allows high-throughput configuration loading in real-time control loops (e.g., ECU calibration tables). |
| Write cycle time | 4 ms max (3.2 ms typ) for byte/page - defines minimum interval between successive write commands. |
| Endurance | 0.4 million cycles at 145°C - validated reliability for under-hood applications with sustained thermal stress. |
| Data retention | 50+ years at 125°C - ensures long-term integrity of calibration data in automotive life-cycle deployments. |
| Supply voltage | 1.7 V to 5.5 V - interoperable with 1.8 V, 3.3 V, and 5 V MCU I/O domains without level shifters. |
| Operating temp | –40°C to +145°C (Grade 0) - qualified per AEC-Q100 for direct mounting on powertrain and battery modules. |
Pinout & Package
Package: TSSOP8 (169 mil width), ECOPACK2-compliant, surface-mount, 8-pin plastic package with gull-wing leads.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| C | Serial clock input | Synchronizes all SPI transfers; rising edge latches input (D), falling edge outputs data (Q). |
| D | Serial data input | Carries instruction, address, and write data; MSB-first, sampled on rising C edge. |
| Q | Serial data output | Outputs read data and status register contents; high-impedance when not selected or in HOLD. |
| S | Chip select input | Active-low enable; falling edge initiates command decoding; must be high between byte boundaries. |
| HOLD | Communication hold input | Pauses ongoing SPI transfer without resetting internal state; requires S low and C low to activate. |
| W | Hardware write protect | Controls SRWD-dependent status register writability; low disables WRSR when SRWD = 1. |
| VCC | Power supply | 1.7–5.5 V supply; powers core logic, HV generator, and I/O buffers; decoupling required near pin. |
| VSS | Ground reference | Common return for VCC and all signal I/Os; must be low-impedance connection to minimize noise coupling. |
Key Features
| Feature | Design Value |
|---|---|
| Embedded ECC logic | Corrects single-bit errors and detects double-bit errors in real time during memory reads - eliminates need for external checksum validation in safety-critical boot code storage. |
| Lockable ID page | 32-byte identification page with permanent read-only lock (LID instruction) - secures ST device ID and enables tamper-resistant storage of calibration keys or serial numbers. |
| Dual write protection | Software (BP0/BP1 bits) + hardware (W pin + SRWD bit) enforcement - prevents accidental or malicious overwrites of critical firmware parameters during field updates. |
| Schmitt trigger inputs | On C, D, S, HOLD, and W pins - rejects noise spikes up to 30% VCC, ensuring robust operation in electrically noisy engine compartments. |
| Extended temperature endurance | 0.4M write cycles at +145°C - validated for continuous operation in proximity to inverters and DC-DC converters in EV power electronics. |
Applications
| Engine Control Unit (ECU) | Battery Management System (BMS) |
|---|---|
|
Use Scenario: Storing adaptive ignition timing maps and knock sensor calibration coefficients updated during vehicle learning cycles. IC Role / Device Role / Timing Role: Nonvolatile parameter store with ECC-protected read path and hardware write lock during engine runtime. Use Value: Prevents corruption of combustion optimization data under 145°C under-hood temperatures and EMI from ignition coils. |
Use Scenario: Retaining cell balancing history, SOC/SOH tracking logs, and fault event timestamps across power cycles. IC Role / Device Role / Timing Role: High-reliability data logger with page-write efficiency and 50-year data retention at battery pack operating temperatures. Use Value: Enables accurate lifetime prediction of traction batteries without periodic recalibration or external backup power. |
| Advanced Driver Assistance Systems (ADAS) | Electric Power Steering (EPS) |
|
Use Scenario: Holding camera lens calibration offsets and radar beamforming coefficients subject to thermal drift compensation. IC Role / Device Role / Timing Role: Secure configuration vault with locked ID page storing manufacturer-specific tuning parameters. Use Value: Ensures functional safety compliance (ISO 26262 ASIL-B) by preventing unauthorized modification of sensor fusion parameters. |
Use Scenario: Storing torque assist profiles, motor phase alignment data, and fault recovery states in steer-by-wire modules. IC Role / Device Role / Timing Role: Real-time writable memory with HOLD pin support to suspend writes during steering transients. Use Value: Guarantees uninterrupted torque assist delivery during microcontroller interrupts caused by CAN bus arbitration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25DF041A-MAHN-T | 4-Mbit SPI Flash (not EEPROM); no built-in ECC; 100k write cycles at 85°C; no ID page. | Lacks byte-alterability and ECC - requires external wear leveling and error detection firmware. | Choose only if higher density and lower cost outweigh need for guaranteed byte-level reliability and safety certification. |
| BR24G32FJ-3GE2 | 32-Kbit I²C EEPROM; AEC-Q100 Grade 2 (–40°C to +105°C); 1 MHz max clock; no HOLD pin. | Lower temperature rating and slower interface - unsuitable for direct replacement in 145°C zones or high-bandwidth logging. | Select only for cost-sensitive cabin modules where thermal margin and throughput are less critical than under-hood systems. |
Compared with AT25DF041A-MAHN-T and BR24G32FJ-3GE2, the M95320-DWDW4TP/K uniquely delivers Grade 0 qualification, embedded ECC, 20 MHz SPI, and a lockable ID page - making it the only option qualified for ASIL-B–compliant parameter storage in powertrain and ADAS control units.
Availability
M95320-DWDW4TP/K is available at Aetrix Electronics and suitable for engine control units, battery management systems, and ADAS sensor modules requiring stable component supply across automotive production lifecycles.
Supply support for M95320-DWDW4TP/K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader specializing in automotive, industrial, and power management solutions, with deep expertise in nonvolatile memory design and AEC-Q100 qualification.
This device belongs to ST's automotive-grade serial EEPROM product line, engineered specifically for mission-critical data retention in extreme-temperature environments such as powertrain, chassis, and electrification systems.
FAQ
What is the function of the HOLD pin, and how does it differ from chip deselect?
The HOLD pin pauses active SPI communication while keeping the device selected (S remains low), preserving internal address and state registers. Unlike chip deselect (S high), which resets the command sequence and forces reinitialization, HOLD allows seamless resumption after microcontroller interrupts - critical for time-sensitive automotive control loops where latency must be minimized.
How does the embedded ECC logic operate during a read operation?
ECC logic automatically checks each 32-byte page during read access: it corrects any single-bit error in real time and flags double-bit errors via status register bits. No host intervention is needed - corrected data appears on Q pin transparently, and uncorrectable errors trigger a status flag for diagnostic logging, satisfying ISO 26262 fault detection requirements.
Can the identification page be rewritten after being locked with the LID instruction?
No. Once the LID (Lock ID) instruction is executed, the entire 32-byte identification page becomes permanently read-only - even a power cycle or WREN/WRSR sequence cannot unlock it. This one-time programmability ensures cryptographic keys, calibration IDs, or device fingerprints remain immutable throughout the vehicle's service life.
What happens if a page write crosses the 32-byte boundary?
If more than 32 bytes are shifted in during a single WRITE instruction with S held low, the internal address counter rolls over to the start of the same page, overwriting earlier bytes. Only the final 32 bytes received are retained - this behavior is deterministic and documented in the datasheet, enabling predictable firmware update protocols.
M95320-DWDW4TP/K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 32Kbit
- Memory Organization:
- 4K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 10 MHz
- Write Cycle Time - Word, Page:
- 4ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 145°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
M95320-DWDW4TP/K FAQ
1.How can I place an order for M95320-DWDW4TP/K through Aetrix?
Please submit a Request for Quotation (RFQ) for M95320-DWDW4TP/K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95320-DWDW4TP/K reliable?
The price and inventory of M95320-DWDW4TP/K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95320-DWDW4TP/K is usually 5 days.
3.What payment methods are accepted for M95320-DWDW4TP/K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95320-DWDW4TP/K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95320-DWDW4TP/K?
M95320-DWDW4TP/K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95320-DWDW4TP/K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95320-DWDW4TP/K?
For technical support, including M95320-DWDW4TP/K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95320-DWDW4TP/K requirements.
6.How does Aetrix verify that M95320-DWDW4TP/K is sourced from the original manufacturer or authorized distributors?
All M95320-DWDW4TP/K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95320-DWDW4TP/K meets industry standards.
7.What is the process for return or replacement of M95320-DWDW4TP/K?
All M95320-DWDW4TP/K units undergo pre-shipment inspection (PSI). If there is an issue with M95320-DWDW4TP/K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95320-DWDW4TP/K part is unused and in its original packaging.
Return procedure for M95320-DWDW4TP/K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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