STMicroelectronics M95320-WMN6TP

Overview

M95320-WMN6TP from STMicroelectronics is a 32-Kbit serial SPI bus EEPROM organized as 4096 × 8 bits, operating from 2.5 V to 5.5 V supply and rated for -40°C to +85°C industrial temperature range. It supports 20 MHz clock speed, 32-byte page writes completing in ≤5 ms, and offers quarter/half/whole array write protection via hardware W pin and status register BP bits. Used in embedded system configuration storage, sensor calibration data retention, and firmware parameter backup.

For engineers reviewing the M95320-WMN6TP datasheet, M95320-WMN6TP pinout, M95320-WMN6TP application, or M95320-WMN6TP equivalent, key selection criteria include SPI mode compatibility (CPOL=0/CPHA=0 or CPOL=1/CPHA=1), VCC voltage margin (2.5–5.5 V), write endurance (>4 million cycles), data retention (>200 years), and SO8N package mechanical fit (150 mil width, 1.27 mm pitch).

Technical Context

The M95320-WMN6TP implements a standard SPI interface with four active control signals (S, C, D, Q) and two functional pins (W, HOLD), supporting both Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1) timing. Its internal architecture includes an 8-bit address/data shift register, page decoder, status register with WIP/WEL/BP1/BP0/SRWD bits, and dedicated logic for hold condition management and write enable/disable sequencing.

Write operations are controlled through explicit WREN instruction followed by WRITE command; status polling via RDSR is required before initiating new commands. The device features non-volatile BP bits that define protected memory blocks (1/4, 1/2, or full array), and includes hardware-level write lock for the optional identification page - though M95320-W variant does not implement ID page functionality per datasheet Section 6.7–6.10.

Key Specifications

Pinout & Package

Package: SO8N (ECOPACK2®), 8-lead plastic small outline, 150 mil body width, 1.27 mm lead pitch, RoHS-compliant surface-mount package.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Compared with AT25320B-SSHL-T and BR24T32FJ-WE2, the M95320-WMN6TP uniquely combines industrial-grade temperature range (-40°C to +85°C), SO8N ECOPACK2® packaging, HOLD functionality, and 20 MHz performance - making it optimal for ruggedized embedded systems requiring deterministic SPI timing and long-term reliability.

Availability

M95320-WMN6TP is available at Aetrix Electronics and suitable for industrial PLC configuration storage, automotive body control modules, and smart energy meter firmware settings requiring stable component supply across extended production lifecycles.

Supply support for M95320-WMN6TP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader specializing in microcontrollers, power management ICs, sensors, and nonvolatile memory solutions for industrial, automotive, and consumer markets.

The M95320-W series belongs to ST's serial EEPROM product line, designed specifically for reliable, low-pin-count configuration storage in space-constrained embedded systems requiring high endurance and long data retention.

FAQ

What SPI modes does M95320-WMN6TP support?

The M95320-WMN6TP supports SPI Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1). In both modes, data is latched on the rising edge of the Serial Clock (C) and output changes on the falling edge. The difference lies in idle clock polarity: C remains low in Mode 0 and high in Mode 3. This dual-mode compatibility ensures seamless integration with diverse microcontroller SPI peripherals without firmware modification.

How is write protection implemented on M95320-WMN6TP?

Write protection is implemented through a combination of hardware and register control: the W pin enables or disables protection based on its logic level, while BP0 and BP1 bits in the Status Register define protected block size (quarter, half, or full memory array). Protection becomes active only after W is asserted and BP bits are set via WRSR instruction. The SRWD bit locks BP bits permanently once set, preventing further changes to protection configuration.

Does M95320-WMN6TP include an identification page?

No, the M95320-WMN6TP does not include an identification page. Per STMicroelectronics' datasheet DocID5711 Rev 16, the identification page (32 bytes, lockable in Read-only mode) is exclusive to M95320-D variants (e.g., M95320-DF). The M95320-W family - including M95320-WMN6TP - omits this feature and contains only the main 4096-byte memory array with standard SPI read/write instructions.

What is the maximum junction temperature during continuous operation?

The M95320-WMN6TP has no separate junction temperature rating; its absolute maximum operating temperature is specified as -40°C to +85°C ambient, with thermal characteristics defined under standard SO8N package conditions. At 85°C ambient and typical power dissipation (<1 mW in standby, <5 mW during active write), junction temperature remains within safe limits without heatsinking. Derating is not required below 85°C ambient per datasheet Section 8 and Table 8.