STMicroelectronics M95512-RCS6TP/K
- Part No.:
- M95512-RCS6TP/K
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-UFBGA, WLCSP
- Datasheet:
-
M95512-RCS6TP/K.pdf
- Description:
- IC EEPROM 512KBIT SPI 8WLCSP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
M95512-RCS6TP/K from STMicroelectronics is a 512-Kbit (64-Kbyte) serial SPI EEPROM organized as 65536 × 8 bits, operating from 1.8 V to 5.5 V over –40 °C to +85 °C. It features 128-byte page write capability with ≤5 ms write time, hardware- and software-based write protection (quarter/half/whole array), and an additional 128-byte Identification page for locked application parameters. Used in industrial control modules for firmware parameter storage and calibration data retention.
For engineers reviewing the M95512-RCS6TP/K datasheet, M95512-RCS6TP/K pinout, M95512-RCS6TP/K application, or M95512-RCS6TP/K equivalent, this device supports CPOL=0/CPHA=0 and CPOL=1/CPHA=1 SPI modes, offers >4 million write cycles, 200-year data retention, ECOPACK2-compliant packaging, and robust ESD protection - critical for embedded systems requiring long-term nonvolatile configuration storage under voltage and thermal stress.
Technical Context
The M95512-RCS6TP/K implements a synchronous SPI interface with dual-mode clock polarity support (CPOL/CPHA = 0/0 or 1/1), where data is latched on the rising edge of C and output on its falling edge. Its internal architecture includes a status register with WIP/WEL/BP1/BP0/SRWD bits, enabling precise control over write enable state and block-level memory protection.
It integrates a high-voltage generator and sequencer for internal write operations, ECC logic for data integrity, and a dedicated Identification page (128 bytes) accessible only via RDID/WRID instructions - a feature exclusive to the -DF/-R variants and absent in the -W version. The HOLD pin allows communication suspension without chip deselection, preserving instruction context during host interrupt handling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 512 Kbit (65536 × 8 bits); sufficient for storing bootloader configs, sensor calibration tables, or device identity tokens in space-constrained designs. |
| Supply voltage range | 1.8 V to 5.5 V; enables direct interfacing with 1.8 V microcontrollers and compatibility with legacy 3.3 V/5 V systems without level-shifting. |
| Write time (byte/page) | ≤5 ms per byte or per 128-byte page; reduces firmware update latency and improves system responsiveness during field reconfiguration. |
| Endurance & retention | >4 million write cycles and >200 years data retention at 85 °C; meets industrial lifecycle requirements for unattended operation in remote monitoring equipment. |
| SPI clock frequency | Up to 16 MHz; supports high-throughput parameter loading in real-time control loops or fast-boot applications. |
| Write protection | Configurable via BP1/BP0 bits (none/quarter/half/whole array) and SRWD+W pin; provides layered security against accidental or malicious writes to critical firmware regions. |
| Operating temperature | –40 °C to +85 °C; qualified for use in automotive body electronics, industrial PLCs, and outdoor IoT gateways without derating. |
Pinout & Package
Package: UFDFPN8 (2 mm × 3 mm, 0.5 mm pitch), ECOPACK2-compliant, halogen-free, RoHS-compliant surface-mount package optimized for high-density PCB layouts and automated assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| S | Chip select | Active-low enable signal; must transition from high to low before any SPI transaction; edge-sensitive reset behavior prevents spurious writes during power-up. |
| C | Serial clock | Master-generated clock (up to 16 MHz); rising edge latches input (D), falling edge outputs data (Q); supports both CPOL=0 and CPOL=1 modes. |
| D | Serial data input | Input for instructions, addresses, and write data; MSB-first protocol; sampled on rising edge of C after S goes low. |
| Q | Serial data output | Output for read data and status register contents; driven on falling edge of C; tri-stated when S is high or HOLD is active. |
| W | Write protect | Hardware lock for Status register (BP1/BP0/SRWD); when SRWD=1 and W=low, Status register becomes permanently read-only. |
| HOLD | Communication hold | Pauses ongoing SPI transfer without resetting internal state; requires S=low to activate; Q goes high-Z while D/C are ignored. |
| VCC | Power supply | 1.8–5.5 V supply; requires local 10–100 nF decoupling capacitor near pins to maintain stability during write cycles. |
| VSS | Ground reference | Return path for all signals and internal circuitry; must be low-impedance and co-located with VCC decoupling. |
Key Features
| Feature | Design Value |
|---|---|
| Identification page | 128-byte dedicated memory area for secure storage of device-specific parameters (e.g., calibration coefficients, MAC address), lockable to permanent read-only mode via LID instruction. |
| Dual SPI mode support | Operates in both CPOL=0/CPHA=0 and CPOL=1/CPHA=1 configurations, ensuring interoperability with diverse MCU families (e.g., STM32, NXP Kinetis, Renesas RA) without firmware modification. |
| Hardware + software write protection | Combines SRWD+W pin locking with BP1/BP0 software configuration to enforce multi-layered protection - e.g., prevent field updates to boot code while allowing runtime logging to unprotected pages. |
| High endurance & retention | Rated for >4 million write cycles and >200 years data retention at 85 °C, eliminating need for wear-leveling firmware in applications like smart meter tamper logs or HVAC setpoint history. |
| ECOPACK2 packaging | UFDFPN8 footprint (2 × 3 mm) with halogen-free, RoHS-compliant construction; supports fine-pitch reflow, IPC Class 3 reliability, and thermal cycling performance up to 1000 cycles. |
Applications
| Industrial PLC Configuration Storage | Automotive Body Control Module (BCM) |
|---|---|
|
Use Scenario: Storing I/O mapping tables, PID tuning parameters, and user-defined logic rules in programmable logic controllers deployed in factory automation lines. IC Role / Device Role / Timing Role: Nonvolatile configuration store accessed during cold boot and runtime reconfiguration; retains settings across power loss and firmware upgrades. Use Value: Enables plug-and-play replacement of PLC modules without manual reprogramming; 200-year retention ensures data integrity over full equipment lifetime (15+ years). |
Use Scenario: Holding door lock actuator calibration offsets, mirror position presets, and lighting dimming profiles in vehicle BCMs subjected to wide thermal cycling (-40 °C to +85 °C). IC Role / Device Role / Timing Role: Parameter EEPROM interfaced directly to BCM's 1.8 V CAN microcontroller; accessed during ignition-on initialization and dynamic adjustment events. Use Value: Eliminates external voltage translators; 1.8 V operation matches MCU core voltage, reducing BOM count and board space vs. legacy 5 V EEPROMs. |
| Smart Energy Meter Firmware Vault | Medical Infusion Pump Calibration Archive |
|
Use Scenario: Securing tariff schedules, metering constants, and cryptographic keys in ANSI C12.22-compliant utility meters exposed to extended outdoor service life. IC Role / Device Role / Timing Role: Secure storage element with Identification page locked via LID instruction; write-protected using SRWD+W and BP bits to prevent unauthorized key overwrite. Use Value: Meets IEC 62056-21 security requirements; >4M write cycles support daily firmware patching over 10+ years without degradation. |
Use Scenario: Archiving flow-rate calibration coefficients, motor torque compensation curves, and safety-critical alarm thresholds in FDA Class II infusion pumps. IC Role / Device Role / Timing Role: Fail-safe nonvolatile memory with >200-year data retention; accessed during pre-use self-test and logged after each delivery cycle. Use Value: Ensures traceability and regulatory compliance (IEC 62304); ECC logic prevents silent corruption of dose-critical parameters during EMI exposure. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial SPI EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25DF512C-SSH-T | 512 Kbit SPI flash (not EEPROM); lacks built-in Identification page and hardware write protect (W pin); uses JEDEC SFDP for configuration. | No native support for locked parameter storage or SRWD-enabled status register lockdown; requires external logic for equivalent security. | Select only if cost sensitivity outweighs need for guaranteed write-cycle endurance and secure parameter vaulting. |
| M95512-DFMN6TP/K | Same die, identical electrical specs, but in SO8N (150 mil) package; no WLCSP or DFN variants; lacks WLSCP8 footprint. | Preferred for through-hole prototyping or legacy board redesigns where 5.0 × 4.0 mm SOIC-8 is already allocated. | Choose when mechanical compatibility with existing SOIC footprints is mandatory and 2×3 mm DFN layout is not feasible. |
Compared with AT25DF512C-SSH-T, M95512-RCS6TP/K delivers deterministic 5 ms write latency and >4M endurance essential for frequent parameter updates, whereas the flash alternative incurs variable erase latency and lower write-cycle tolerance. Against M95512-DFMN6TP/K, the -RCS6TP/K offers superior board-area efficiency and thermal performance in compact medical or automotive modules.
Availability
M95512-RCS6TP/K is available at Aetrix Electronics and suitable for industrial PLCs, automotive body control modules, smart energy meters, and medical infusion pumps requiring stable component supply, long-term obsolescence management, and ECOPACK2-compliant sourcing.
Supply support for M95512-RCS6TP/K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.
This device belongs to ST's M95xxx serial EEPROM product line, engineered specifically for reliable, low-voltage, high-endurance nonvolatile storage in resource-constrained embedded systems where data integrity and long-term retention are mission-critical.
FAQ
What SPI modes does M95512-RCS6TP/K support?
M95512-RCS6TP/K supports two SPI modes: CPOL = 0, CPHA = 0 and CPOL = 1, CPHA = 1. In both, input data is latched on the rising edge of the serial clock (C), and output data appears on the falling edge. The difference lies only in idle clock polarity - C remains low in mode 0,0 and high in mode 1,1 - ensuring compatibility with most modern MCUs without protocol translation.
How is the Identification page different from main memory?
The Identification page is a dedicated 128-byte memory region accessible only via RDID/WRID instructions (not standard READ/WRITE). It can be permanently locked to read-only mode using the LID instruction, making it ideal for storing immutable device-specific data like calibration constants or cryptographic keys that must survive firmware updates and cannot be overwritten accidentally or maliciously.
Can M95512-RCS6TP/K operate reliably at 1.8 V?
Yes - the "-R" suffix explicitly denotes 1.8 V to 5.5 V operation. At 1.8 V, it maintains full functionality including 16 MHz SPI clock support, ≤5 ms write times, and all protection features. This enables direct integration with 1.8 V logic families and ultra-low-power microcontrollers without level shifters or voltage boosters.
What happens if HOLD is asserted mid-transaction?
When HOLD is driven low while Chip Select (S) is low, serial communication pauses immediately: Q goes high-impedance, and D/C are ignored. The internal state (address counter, instruction decode) is preserved. Communication resumes on HOLD high, with no loss of context - enabling host MCU interrupt servicing without aborting EEPROM operations or requiring re-initialization.
M95512-RCS6TP/K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-UFBGA, WLCSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 512Kbit
- Memory Organization:
- 64K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 16 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WLCSP
M95512-RCS6TP/K FAQ
1.How can I place an order for M95512-RCS6TP/K through Aetrix?
Please submit a Request for Quotation (RFQ) for M95512-RCS6TP/K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95512-RCS6TP/K reliable?
The price and inventory of M95512-RCS6TP/K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95512-RCS6TP/K is usually 5 days.
3.What payment methods are accepted for M95512-RCS6TP/K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95512-RCS6TP/K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95512-RCS6TP/K?
M95512-RCS6TP/K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95512-RCS6TP/K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95512-RCS6TP/K?
For technical support, including M95512-RCS6TP/K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95512-RCS6TP/K requirements.
6.How does Aetrix verify that M95512-RCS6TP/K is sourced from the original manufacturer or authorized distributors?
All M95512-RCS6TP/K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95512-RCS6TP/K meets industry standards.
7.What is the process for return or replacement of M95512-RCS6TP/K?
All M95512-RCS6TP/K units undergo pre-shipment inspection (PSI). If there is an issue with M95512-RCS6TP/K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95512-RCS6TP/K part is unused and in its original packaging.
Return procedure for M95512-RCS6TP/K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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