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STMicroelectronics M95512-RMB6TG
- Part No.:
- M95512-RMB6TG
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-UFDFN Exposed Pad
- Datasheet:
-
M95512-RMB6TG.pdf
- Description:
- IC EEPROM 512KBIT SPI 8UFDFPN
- Quantity:
- Payment:
- Shipping:
Inventory:1,663
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Product details
Overview
M95512-RMB6TG from STMicroelectronics is a 512-Kbit (64-Kbyte) serial SPI EEPROM organized as 65536 × 8 bits, operating from 1.8 V to 5.5 V supply, featuring 128-byte page write capability, 5 ms max byte/page write time, and hardware/software write protection with BP1/BP0 bits. It supports industrial temperature range (−40 °C to +85 °C) and is used in embedded system configuration storage, sensor calibration data retention, and firmware parameter backup.
For engineers reviewing the M95512-RMB6TG datasheet, M95512-RMB6TG pinout, M95512-RMB6TG application, or M95512-RMB6TG equivalent, key selection criteria include its 1.8 V minimum VCC, Identification page support (128 bytes), ECOPACK2-compliant UFDFPN8 (2 × 3 mm) package, and dual SPI mode compatibility (CPOL/CPHA = 0/0 or 1/1).
Technical Context
The device implements a standard SPI interface with dedicated HOLD and W signals for transaction pausing and hardware-based memory locking. Its internal architecture includes an ECC-enabled sense amplifier array, page latches, and a status register with non-volatile BP1/BP0 and SRWD bits controlling quarter/half/full array protection and Status register write disable functionality.
It supports two SPI clock polarities and phases (CPOL=0/CPHA=0 and CPOL=1/CPHA=1), with data latched on C rising edge (D input) and output shifted on C falling edge (Q output). The Identification page-exclusive to the -DF variant-is not present in M95512-RMB6TG; this part belongs to the M95512-R family and lacks RDID/WRID/LID instructions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 512 Kbit (64 Kbyte), organized as 65536 × 8 bits - directly addressable via 16-bit SPI address field |
| Supply voltage | 1.8 V to 5.5 V - enables direct interfacing with 1.8 V, 3.3 V, and 5 V microcontrollers without level shifting |
| Write speed | ≤5 ms per byte or per 128-byte page - ensures fast parameter updates in real-time control loops |
| Endurance | 4 million write cycles - supports frequent recalibration or logging in industrial monitoring systems |
| Data retention | 200 years at 25 °C - guarantees long-term integrity of stored calibration coefficients or security keys |
| Operating temp | −40 °C to +85 °C - qualified for automotive body electronics, industrial PLCs, and outdoor IoT nodes |
| SPI clock rate | Up to 16 MHz - allows high-throughput configuration loading during boot or firmware update |
Pinout & Package
Package: UFDFPN8 (2 mm × 3 mm, 0.5 mm pitch, ECOPACK2-compliant). Exposed pad (EP) is connected to VSS for thermal and electrical stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (S) | Chip Select | Active-low enable; must transition low-to-high between instructions; edge-sensitive reset behavior prevents spurious writes at power-up |
| 2 (W) | Write Protect | Hardware lock input; when low + SRWD=1, disables WRSR and freezes BP1/BP0 bits permanently |
| 3 (VSS) | Ground | Reference for all I/O and internal circuitry; tied to exposed pad for optimal noise immunity |
| 4 (C) | Serial Clock | Master-generated timing signal; rising edge clocks D input, falling edge outputs Q data; supports CPOL=0/1, CPHA=0/1 |
| 5 (Q) | Serial Data Output | Tri-state open-drain output; driven only when S=low; MSB-first, synchronized to C falling edge |
| 6 (HOLD) | Hold Control | Pauses ongoing SPI transfer without deselecting device; Q goes high-Z, D/C ignored; requires S=low to activate |
| 7 (VCC) | Supply Voltage | 1.8–5.5 V input; requires local 10–100 nF decoupling capacitor near pins 3 and 7 |
| 8 (D) | Serial Data Input | MSB-first instruction/address/data input; sampled on C rising edge; accepts WREN, READ, WRITE, RDSR, etc. |
Key Features
| Feature | Design Value |
|---|---|
| Page write architecture | 128-byte pages reduce write overhead vs. byte-by-byte; enables efficient bulk parameter updates in <5 ms |
| Multi-level write protection | Software-configurable (BP1/BP0) + hardware-enforced (W + SRWD) locking prevents accidental or malicious memory corruption |
| Industrial-grade reliability | 4M write cycles and 200-year retention validated per JEDEC JESD22-A117; suitable for mission-critical firmware storage |
| Low-voltage operation | 1.8 V minimum VCC enables direct integration with ultra-low-power MCUs (e.g., STM32L4/L5) without external regulators |
| ECOPACK2 packaging | Halogen-free, RoHS-compliant UFDFPN8 reduces PCB footprint by >50% vs. SO8N while maintaining thermal performance |
Applications
| Smart Energy Metering | Automotive Body Control Module |
|---|---|
|
Use Scenario: Storing tariff tables, meter calibration constants, and tamper-event logs across 15+ year field life. IC Role / Device Role / Timing Role: Non-volatile configuration and event history storage; accessed asynchronously during wake-up or communication windows. Use Value: 200-year data retention and 4M write cycles ensure compliance with IEC 62056 and EN 13757-3 over full product lifecycle. |
Use Scenario: Retaining seat position memory, mirror angle settings, and lighting profiles across ignition cycles. IC Role / Device Role / Timing Role: Dedicated parameter EEPROM interfaced to LIN or CAN gateway MCU; updated only on user command or power-down. Use Value: Hardware write protect (W pin) prevents corruption during battery transients; −40 °C to +85 °C rating matches under-hood ambient requirements. |
| Industrial PLC I/O Module | Medical Infusion Pump |
|
Use Scenario: Holding channel-specific gain/offset trims, sensor linearization coefficients, and firmware update metadata. IC Role / Device Role / Timing Role: SPI-configurable calibration store; read at startup and written during maintenance mode via isolated debug interface. Use Value: 128-byte page writes enable atomic coefficient updates; 16 MHz SPI clock supports fast reconfiguration during factory calibration. |
Use Scenario: Securing drug library parameters, dose limits, and operator audit trails with traceable, unalterable records. IC Role / Device Role / Timing Role: Safety-critical non-volatile storage; write-protected via SRWD+WP to meet IEC 62304 Class C software requirements. Use Value: Dual protection (software BP bits + hardware W/SRWD) satisfies FDA design controls for data integrity and change prevention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial SPI EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25DF512C-SSH-T | 512 Kbit, 2.3–3.6 V supply, no HOLD pin, 8-pin SOIC only | Lacks HOLD functionality and wide-VCC flexibility; limited to 3.3 V systems | Select when board space allows SOIC and system operates strictly at 3.3 V with no need for transaction pause |
| BR24G512FJ-3GE2 | 512 Kbit, 1.7–5.5 V, built-in write protect register, 8-pin TSSOP | Includes software WP register but no hardware W pin; different status register map | Prefer for designs requiring register-based protection without external pin routing, accepting TSSOP footprint |
Compared with AT25DF512C-SSH-T and BR24G512FJ-3GE2, M95512-RMB6TG uniquely combines 1.8 V operation, hardware HOLD, physical W pin, and UFDFPN8 miniaturization-making it optimal for space-constrained, multi-rail industrial and automotive nodes requiring robust transaction control.
Availability
M95512-RMB6TG is available at Aetrix Electronics and suitable for smart metering, automotive body electronics, industrial PLC modules, and medical infusion pumps requiring stable component supply across extended product lifecycles.
Supply support for M95512-RMB6TG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, designing and manufacturing microcontrollers, power ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.
M95512-RMB6TG belongs to ST's serial EEPROM product line, engineered specifically for reliable, low-voltage, high-endurance non-volatile storage in resource-constrained embedded systems with stringent safety and longevity requirements.
FAQ
Does M95512-RMB6TG support the Identification page feature?
No. The Identification page (RDID/WRID/LID instructions) is exclusive to the M95512-DF variant. M95512-RMB6TG is part of the M95512-R family and implements only the standard 64-Kbyte memory array with no additional identification page. Its status register and instruction set omit RDID, WRID, RDLS, and LID opcodes.
What is the function of the HOLD pin during active SPI communication?
The HOLD pin pauses ongoing SPI transfers without deselecting the device or resetting internal state. When asserted low (with S low), Q enters high-impedance, and D/C are ignored. Communication resumes upon HOLD return to high, preserving clock phase and instruction context-enabling priority interrupt handling in real-time systems.
How does hardware write protection interact with the Status Register Write Disable (SRWD) bit?
When SRWD = 1 and the W pin is driven low, the device enters Hardware Protected mode: BP1, BP0, and SRWD become read-only, and WRSR instructions are rejected. This provides irreversible lock-down of protection settings-critical for security-sensitive applications like medical device calibration or automotive firmware keys.
Can M95512-RMB6TG operate reliably at 1.8 V while sustaining 16 MHz SPI clock?
Yes. Per DS4192 Rev 24 Section 9 AC characteristics, tCLQV (clock high to Q valid) and tCLQX (clock high to Q high-Z) are specified down to 1.8 V at 16 MHz. The device maintains full timing compliance across its entire 1.8–5.5 V VCC range, enabling consistent high-speed operation without voltage scaling.
M95512-RMB6TG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-UFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 512Kbit
- Memory Organization:
- 64K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-UFDFPN (2x3)
M95512-RMB6TG FAQ
1.How can I place an order for M95512-RMB6TG through Aetrix?
Please submit a Request for Quotation (RFQ) for M95512-RMB6TG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95512-RMB6TG reliable?
The price and inventory of M95512-RMB6TG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95512-RMB6TG is usually 5 days.
3.What payment methods are accepted for M95512-RMB6TG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95512-RMB6TG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95512-RMB6TG?
M95512-RMB6TG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95512-RMB6TG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95512-RMB6TG?
For technical support, including M95512-RMB6TG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95512-RMB6TG requirements.
6.How does Aetrix verify that M95512-RMB6TG is sourced from the original manufacturer or authorized distributors?
All M95512-RMB6TG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95512-RMB6TG meets industry standards.
7.What is the process for return or replacement of M95512-RMB6TG?
All M95512-RMB6TG units undergo pre-shipment inspection (PSI). If there is an issue with M95512-RMB6TG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95512-RMB6TG part is unused and in its original packaging.
Return procedure for M95512-RMB6TG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
M95512-RMB6TG Tags
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