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STMicroelectronics M95640-RMC6TG
- Part No.:
- M95640-RMC6TG
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-UFDFN Exposed Pad
- Datasheet:
-
M95640-RMC6TG.pdf
- Description:
- IC EEPROM 64KBIT SPI 8UFDFPN
- Quantity:
- Payment:
- Shipping:
Inventory:18,123
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Product details
Overview
M95640-RMC6TG from STMicroelectronics is a 64-Kbit serial SPI bus EEPROM organized as 8192 × 8 bits, operating from 1.8 V to 5.5 V supply with -40 °C to +85 °C temperature range. It features 32-byte page write (typ. 3.4 ms), 20 MHz clock support, Schmitt-trigger inputs, and dual-level write protection (software quarter-block + hardware full-array). Used in industrial control modules for parameter storage and firmware configuration.
For engineers reviewing the M95640-RMC6TG datasheet, M95640-RMC6TG pinout, M95640-RMC6TG application, or M95640-RMC6TG equivalent, key selection criteria include supply voltage compatibility (1.8–5.5 V), identification page lockability, SPI mode support (CPOL/CPHA = 0/0 or 1/1), and ECOPACK2-compliant TSSOP8 packaging.
Technical Context
The device implements a standard SPI interface with dedicated HOLD and W pins enabling pause-on-demand and hardware-based memory array protection. Its status register includes non-volatile BP1/BP0 bits for software-configurable block protection and SRWD bit that-when asserted with W low-locks the entire status register against modification.
It supports two SPI modes (CPOL=0, CPHA=0 and CPOL=1, CPHA=1), with data latched on rising C edge and output shifted on falling C edge. The internal HV generator enables byte/page programming without external high-voltage sources, and the built-in POR circuit prevents spurious writes during power-up.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 64 Kbit (8 Kbytes), organized as 8192 × 8 bits - sufficient for boot parameters, calibration data, and device identity storage in space-constrained designs. |
| Page size | 32 bytes - defines minimum write granularity; enables efficient partial updates without erasing full sectors. |
| Write time | Byte/page write ≤ 5 ms (typ. 3.4 ms) - allows rapid field updates while minimizing system downtime during configuration changes. |
| Supply voltage | 1.8 V to 5.5 V - supports direct interfacing with 1.8 V logic, 3.3 V microcontrollers, and legacy 5 V systems without level shifters. |
| Clock frequency | Up to 20 MHz - enables high-throughput data logging at >2 MB/s effective serial bandwidth (with overhead). |
| Data retention | >200 years - ensures long-term reliability of stored calibration coefficients and security keys across product lifetime. |
| ESD rating | 4000 V HBM - provides robust immunity against handling-induced transients in manufacturing and field service environments. |
Pinout & Package
Package: TSSOP8 (169 mil width), ECOPACK2-compliant, RoHS- and REACH-compliant surface-mount package with 0.65 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| S | Chip select | Active-low enable signal; must transition from high to low before first instruction; edge-sensitive reset behavior prevents spurious activation during power ramp. |
| C | Serial clock | Input timing reference; supports CPOL=0/1 and CPHA=0/1 modes; data latched on rising edge, output shifted on falling edge. |
| D | Serial data input | Carries instructions, addresses, and write data; MSB-first; sampled on rising C edge after S goes low. |
| Q | Serial data output | Drives read data and status register contents; high-impedance when S high or HOLD active; outputs on falling C edge. |
| HOLD | Communication hold | Pauses ongoing SPI transaction without deselecting device; requires S low to activate; Q goes high-Z, D/C become don't-care. |
| W | Hardware write protect | Freezes BP1/BP0/SRWD bits when pulled low and SRWD=1; prevents accidental or malicious status register corruption. |
| VCC | Power supply | 1.8–5.5 V operation; requires local 10–100 nF decoupling capacitor near pins to maintain stability during write cycles. |
| VSS | Ground reference | Common return for all signals and VCC; must be low-impedance connection to avoid noise coupling into sensitive SPI lines. |
Key Features
| Feature | Design Value |
|---|---|
| Identification page | 32-byte lockable memory area for storing immutable device-specific data (e.g., serial number, calibration constants) - permanently read-only after LID command execution. |
| Software block protection | BP1/BP0 bits configure upper quarter/half/entire array as read-only via WRSR instruction - enables selective firmware update zones without external logic. |
| Noise-immune inputs | Schmitt-trigger inputs on S, C, D, HOLD, W - reject sub-100 ns glitches and improve robustness in electrically noisy industrial environments. |
| Enhanced reliability | >4 million write cycles per address - supports frequent logging (e.g., energy meter pulse counts) over 10+ years of daily operation. |
| Power-up safety | Integrated POR circuit holds device inactive until VCC exceeds threshold - eliminates risk of corrupted writes during brown-out or slow ramp conditions. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
|
Use Scenario: Storing I/O mapping tables, PID tuning parameters, and user-defined alarm thresholds in programmable logic controllers. IC Role / Device Role / Timing Role: Non-volatile configuration register accessed via SPI during boot and runtime reconfiguration. Use Value: Enables field-upgradable control logic without requiring firmware reflashing; 200-year retention guarantees parameter integrity across equipment lifecycle. |
Use Scenario: Retaining sensor offset/gain coefficients, patient ID history, and regulatory audit logs in portable diagnostic instruments. IC Role / Device Role / Timing Role: Secure, tamper-resistant data vault with lockable ID page for FDA-compliant traceability. Use Value: Identification page locking prevents unauthorized modification of calibration records; 4 M write cycles support daily recalibration over 10+ years. |
| Automotive Body Control Module | Smart Meter Firmware Metadata |
|
Use Scenario: Saving seat/mirror position presets, lighting profiles, and error code history in 12 V automotive subsystems. IC Role / Device Role / Timing Role: Low-voltage EEPROM interfaced directly to 3.3 V MCU with HOLD support for interrupt-safe parameter access. Use Value: 1.8 V operation allows direct connection to advanced MCUs; HOLD pin enables seamless context switching during CAN message processing. |
Use Scenario: Storing firmware version stamps, cryptographic keys, and tariff schedule timestamps in utility-grade electricity meters. IC Role / Device Role / Timing Role: Trusted configuration anchor with hardware write protection (W + SRWD) preventing remote firmware rollback attacks. Use Value: Hardware-enforced status register lock blocks malicious reprogramming of protection bits; ECOPACK2 package meets stringent environmental compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25DF041A-SSH-T | 4 Mbit density, quad SPI interface, no HOLD pin, 2.7–3.6 V only | Lacks HOLD functionality and wide-voltage support; suited for high-density boot code storage, not real-time parameter logging | Select only if quad SPI bandwidth is required and voltage range is fixed at 3.3 V. |
| BR24G64FJ-WE2 | I²C interface, 64 Kbit, 1.7–5.5 V, no identification page or hardware W protection | Requires different MCU peripheral; lacks lockable ID page and W-pin hardware lock - weaker security posture | Choose only for cost-sensitive I²C-based designs where status register immutability is not mandated. |
Compared with AT25DF041A-SSH-T and BR24G64FJ-WE2, the M95640-RMC6TG uniquely combines wide-voltage SPI operation, HOLD capability, lockable ID page, and hardware-enforced status register protection - making it optimal for safety-critical, field-upgradable embedded systems requiring both flexibility and security.
Availability
M95640-RMC6TG is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostics equipment, automotive body controllers, and smart utility meters requiring stable component supply across multi-year production cycles.
Supply support for M95640-RMC6TG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.
This part belongs to ST's serial EEPROM product line, engineered specifically for robust, low-power, SPI-based non-volatile storage in harsh environments - emphasizing data integrity, long-term retention, and secure configuration management.
FAQ
What is the function of the HOLD pin on M95640-RMC6TG?
The HOLD pin pauses ongoing SPI communication without deselecting the device or resetting internal state. When asserted low (with S low), Q enters high-impedance, and D/C are ignored - allowing the host MCU to service higher-priority interrupts while preserving transaction context. It resumes automatically when HOLD returns high.
Can the identification page be written after initial programming?
Yes - the 32-byte identification page can be written using the WRID instruction, but only before executing the LID (Lock Identification) command. Once LID is issued, the page becomes permanently read-only; no further writes or erases are possible, even with W pulled low or power cycled.
How does hardware write protection interact with software block protection?
Hardware protection (via W pin + SRWD bit) locks the status register itself - preventing changes to BP1/BP0. Software block protection configures which memory regions are read-only *based on current BP1/BP0 values*. Thus, hardware protection secures the policy; software protection enforces the policy on memory content.
Is M95640-RMC6TG compatible with standard SPI peripherals in microcontrollers?
Yes - it supports standard SPI modes 0 (CPOL=0, CPHA=0) and 3 (CPOL=1, CPHA=1), both with MSB-first transmission. No special initialization or custom timing is required; standard SPI libraries (e.g., STM32 HAL_SPI_TransmitReceive) work out-of-the-box with proper chip select management.
M95640-RMC6TG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-UFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-UFDFPN (2x3)
M95640-RMC6TG FAQ
1.How can I place an order for M95640-RMC6TG through Aetrix?
Please submit a Request for Quotation (RFQ) for M95640-RMC6TG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95640-RMC6TG reliable?
The price and inventory of M95640-RMC6TG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95640-RMC6TG is usually 5 days.
3.What payment methods are accepted for M95640-RMC6TG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95640-RMC6TG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95640-RMC6TG?
M95640-RMC6TG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95640-RMC6TG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95640-RMC6TG?
For technical support, including M95640-RMC6TG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95640-RMC6TG requirements.
6.How does Aetrix verify that M95640-RMC6TG is sourced from the original manufacturer or authorized distributors?
All M95640-RMC6TG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95640-RMC6TG meets industry standards.
7.What is the process for return or replacement of M95640-RMC6TG?
All M95640-RMC6TG units undergo pre-shipment inspection (PSI). If there is an issue with M95640-RMC6TG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95640-RMC6TG part is unused and in its original packaging.
Return procedure for M95640-RMC6TG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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