STMicroelectronics M95640-RMN6TP
- Part No.:
- M95640-RMN6TP
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
M95640-RMN6TP.pdf
- Description:
- IC EEPROM 64KBIT SPI 20MHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,603
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Product details
Overview
M95640-RMN6TP from STMicroelectronics is a 64-Kbit serial SPI bus EEPROM organized as 8192 × 8 bits, operating from 1.8 V to 5.5 V supply with -40 °C to +85 °C industrial temperature range. It supports up to 20 MHz clock frequency, features 32-byte page write (typ. 3.4 ms), includes a lockable 32-byte identification page, and implements Schmitt-trigger inputs and hardware/software write protection for robust embedded nonvolatile storage in microcontroller peripherals.
For engineers reviewing the M95640-RMN6TP datasheet, M95640-RMN6TP pinout, M95640-RMN6TP application, or M95640-RMN6TP equivalent, key selection criteria include its 1.8 V minimum VCC, ECOPACK2-compliant SO8 package, dual-mode SPI compatibility (CPOL/CPHA = 0/0 or 1/1), 4M+ write endurance, and 200-year data retention-critical for firmware parameter storage, calibration data logging, and secure device identity management.
Technical Context
The M95640-RMN6TP implements a synchronous serial interface compliant with SPI modes 0 and 3, where data is latched on C's rising edge and output on its falling edge. Its internal architecture includes an HV generator, sequencer, ECC-enabled sense amplifiers, and a status register with WIP, WEL, BP1/BP0, and SRWD bits for granular write control.
It supports byte/page write, read, status register access, and identification page operations (RDID/WRID/LID) with instruction validation (8-bit-aligned command framing). The HOLD pin enables communication pause without chip deselection, while W pin controls hardware-level status register locking when SRWD = 1.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 64 Kbit (8 Kbytes), organized as 8192 × 8 bits - sufficient for bootloader configuration, sensor calibration tables, or device serial number storage. |
| Supply voltage | 1.8 V to 5.5 V - enables direct interfacing with 1.8 V, 3.3 V, and 5 V microcontrollers without level shifting. |
| Max clock frequency | 20 MHz - supports high-throughput parameter updates in real-time systems (e.g., <50 µs per byte at full speed). |
| Write cycle time | Byte/page write ≤5 ms (typ. 3.4 ms) - ensures fast field-updatable settings without blocking host MCU execution for extended periods. |
| Data retention | >200 years at 25 °C - guarantees long-term integrity of factory-programmed identifiers or lifetime usage logs. |
| Endurance | >4 million write cycles - supports frequent runtime logging (e.g., power-cycle counters, error event timestamps) over product lifetime. |
| Operating temperature | -40 °C to +85 °C - qualified for industrial automation, automotive body electronics, and outdoor IoT edge nodes. |
Pinout & Package
Package: SO8 (ECOPACK2), 150 mil width, RoHS-compliant surface-mount package with standard 1.27 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| S | Chip select | Active-low enable signal; falling edge required after power-up before first instruction; deselecting resets internal logic except WEL/WIP bits. |
| C | Serial clock | Input timing reference; supports CPOL=0/CPHA=0 and CPOL=1/CPHA=1 modes; data latched on rising edge, output shifted on falling edge. |
| D | Serial data input | MSB-first input for instructions, addresses, and write data; sampled on rising edge of C; must be stable before setup time. |
| Q | Serial data output | MSB-first output for read data and status register; high-impedance when S is high or HOLD is active. |
| W | Write protect | Hardware lock for status register: when SRWD = 1 and W = low, BP1/BP0/SRWD become read-only and WRSR is rejected. |
| HOLD | Hold | Pauses ongoing SPI transfer without resetting state; requires S = low to activate; Q goes high-Z, D/C become "don't care". |
| VCC | Supply voltage | 1.8–5.5 V power rail; internal POR circuit prevents spurious writes during ramp-up; decoupling capacitor (10–100 nF) required near pins. |
| VSS | Ground | Reference for all I/O and internal circuitry; must be low-impedance return path to minimize noise coupling into sensitive analog blocks. |
Key Features
| Feature | Design Value |
|---|---|
| Lockable identification page | 32-byte dedicated memory area that can be permanently locked in read-only mode via LID instruction - ideal for storing cryptographic keys or device-specific calibration constants. |
| Software/hardware write protection | BP1/BP0 bits configure quarter/half/full array protection; SRWD + W pin enables irreversible hardware lock of status register - prevents accidental or malicious reconfiguration. |
| Schmitt-trigger inputs | Enhanced noise immunity on S, C, D, HOLD, and W pins - eliminates false triggering in electrically noisy industrial environments (e.g., motor drives, PLC backplanes). |
| ESD/latch-up robustness | 4000 V HBM ESD rating and enhanced latch-up immunity - ensures reliability in handling-sensitive assembly lines and field-replaceable modules. |
| Dual SPI mode support | Native compatibility with both CPOL=0/CPHA=0 and CPOL=1/CPHA=1 - eliminates need for software workarounds when interfacing with diverse MCU families (ARM Cortex-M, PIC, RISC-V). |
Applications
| Industrial Sensor Calibration | Medical Device Configuration |
|---|---|
|
Use Scenario: Storing factory-calibrated offset/gain coefficients and temperature compensation curves for analog sensor front-ends in programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile parameter store accessed during system boot and runtime recalibration; retains values across power cycles and brownouts. Use Value: Enables traceable, field-updatable calibration without requiring external programming hardware - reduces service downtime and supports ISO 13485 compliance. |
Use Scenario: Holding user-configurable therapy parameters (e.g., infusion rate limits, alarm thresholds) and device serialization data in portable infusion pumps. IC Role / Device Role / Timing Role: Secure, tamper-resistant configuration memory with lockable ID page for FDA-required unique device identification (UDI) storage. Use Value: Meets IEC 62304 software safety requirements by preventing unauthorized modification of critical treatment parameters via hardware write protection. |
| Automotive Body Control Module | Smart Energy Metering |
|
Use Scenario: Recording seat position memory, mirror angle presets, and lighting profiles in vehicle door modules with CAN/LIN connectivity. IC Role / Device Role / Timing Role: Low-voltage EEPROM interfaced directly to 3.3 V MCU; withstands automotive load-dump transients via robust ESD/latch-up design. Use Value: Operates reliably at 1.8 V during cold-cranking conditions (battery dip to 6 V), ensuring user preferences persist even after deep discharge events. |
Use Scenario: Storing tariff schedules, meter firmware version, and tamper-event logs in ANSI C12.22-compliant smart electricity meters deployed in utility grids. IC Role / Device Role / Timing Role: High-endurance, long-retention memory for regulatory audit trails; supports >1000 write cycles/year over 20-year field life. Use Value: 200-year data retention and 4M+ write cycles eliminate replacement risk - critical for revenue-grade metering where field access is costly and infrequent. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25DF041A-SSH-T | 4 Mbit density, quad SPI interface, 3.3 V only (2.7–3.6 V), no identification page | Larger capacity but lacks lockable ID page and 1.8 V operation; requires quad-SPI driver support | Select when higher density and faster quad-read throughput are needed, and 1.8 V operation is not required. |
| BR24G64FJ-WE2 | I²C interface, 64 Kbit, 1.7–5.5 V, built-in write protection, no HOLD pin | No SPI compatibility; lacks HOLD functionality and identification page; simpler two-wire interface | Select for space-constrained designs where I²C is preferred and HOLD-based transaction pausing is unnecessary. |
Compared with AT25DF041A-SSH-T and BR24G64FJ-WE2, the M95640-RMN6TP uniquely balances 1.8 V SPI operation, lockable ID page, HOLD functionality, and industrial temperature grade - making it optimal for resource-constrained, security-aware embedded systems requiring guaranteed parameter persistence.
Availability
M95640-RMN6TP is available at Aetrix Electronics and suitable for industrial sensor calibration, medical device configuration, automotive body control modules, and smart energy metering requiring stable component supply across multi-year production cycles.
Supply support for M95640-RMN6TP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.
The M95640 series belongs to ST's serial EEPROM product line, engineered specifically for reliable, low-voltage, high-endurance nonvolatile storage in microcontroller-based systems where data integrity, security, and long-term field operation are mandatory.
FAQ
What is the function of the HOLD pin on M95640-RMN6TP?
The HOLD pin pauses ongoing SPI communication without deselecting the device or resetting internal state. When asserted low (with S low), Q goes high-impedance and D/C are ignored, allowing the host MCU to service higher-priority interrupts. Communication resumes upon deasserting HOLD, preserving bit count and instruction context - essential for deterministic real-time systems.
How does the identification page differ from main memory?
The identification page is a dedicated 32-byte memory region accessible only via RDID/WRID instructions. Unlike main array pages, it supports permanent read-only locking via the LID instruction - once locked, its contents cannot be overwritten, even with WEL set or W pin high. This makes it suitable for storing immutable device identifiers or cryptographic material.
Can M95640-RMN6TP operate at 1.8 V while maintaining 20 MHz clock speed?
Yes. The M95640-R variant (including MN6TP suffix) is fully specified for 1.8 V to 5.5 V operation, with AC parameters including tCLQV (clock to Q valid) and tCHSH (clock high setup) validated down to 1.8 V at 20 MHz. No derating is required - enabling direct interface with 1.8 V FPGAs and ultra-low-power MCUs without level shifters.
What happens if the W pin is left floating during operation?
The W pin must be actively driven high or low; floating violates the absolute maximum ratings and may cause undefined behavior in status register protection. If W is unconnected, internal pull-down is not guaranteed. ST recommends tying W to VSS (for hardware lock enable) or VCC (to disable hardware lock), depending on the desired protection scheme - verified in DS6633 Section 3.6.
M95640-RMN6TP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 20 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
M95640-RMN6TP FAQ
1.How can I place an order for M95640-RMN6TP through Aetrix?
Please submit a Request for Quotation (RFQ) for M95640-RMN6TP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95640-RMN6TP reliable?
The price and inventory of M95640-RMN6TP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95640-RMN6TP is usually 5 days.
3.What payment methods are accepted for M95640-RMN6TP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95640-RMN6TP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95640-RMN6TP?
M95640-RMN6TP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95640-RMN6TP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95640-RMN6TP?
For technical support, including M95640-RMN6TP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95640-RMN6TP requirements.
6.How does Aetrix verify that M95640-RMN6TP is sourced from the original manufacturer or authorized distributors?
All M95640-RMN6TP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95640-RMN6TP meets industry standards.
7.What is the process for return or replacement of M95640-RMN6TP?
All M95640-RMN6TP units undergo pre-shipment inspection (PSI). If there is an issue with M95640-RMN6TP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95640-RMN6TP part is unused and in its original packaging.
Return procedure for M95640-RMN6TP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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