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STMicroelectronics M95M04-DWDW3TP/V
- Part No.:
- M95M04-DWDW3TP/V
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
M95M04-DWDW3TP/V.pdf
- Description:
- IC EEPROM 4MBIT SPI 10MHZ 8TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:1,603
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Product details
Overview
M95M04-DWDW3TP/V from STMicroelectronics is an AEC-Q100 Grade 0 automotive serial EEPROM with 4-Mbit (512-Kbyte) capacity, SPI interface up to 10 MHz, and operation from −40°C to +125°C. It features 512-byte page size, software/hardware write protection, embedded ECC logic, and a dedicated 512-byte identification page for device ID and locked application parameters - used in engine control units, ADAS sensor modules, and battery management systems.
For engineers reviewing the M95M04-DWDW3TP/V datasheet, M95M04-DWDW3TP/V pinout, M95M04-DWDW3TP/V application, or M95M04-DWDW3TP/V equivalent, key selection criteria include automotive temperature range compliance (−40°C to +125°C), 1M+ write cycles at 25°C, 512-byte page write timing (≤4 ms), SPI mode compatibility (CPOL=0/CPHA=0 and CPOL=1/CPHA=1), and hardware/software block protection granularity.
Technical Context
This device implements a true EEPROM array organized as 1024 × 512-byte pages (524,288 × 8 bits), with embedded error correction code (ECC) logic enhancing data integrity during read operations. The memory supports byte-alterable writes and includes a dedicated 512-byte identification page that can be permanently locked in read-only mode.
Its SPI interface operates in two standard modes (CPOL=0, CPHA=0 and CPOL=1, CPHA=1), with input latching on rising clock edge and output shifting on falling edge. Write enable latch (WEL), status register (SRWD/BP1/BP0), and HOLD functionality provide deterministic protocol control and robust noise immunity via Schmitt trigger inputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 4 Mbit (524,288 × 8 bits), organized as 1024 pages of 512 bytes each |
| SPI clock frequency | Up to 10 MHz - enables high-throughput firmware parameter updates in real-time ECUs |
| Operating temperature | −40°C to +125°C (Grade 0 AEC-Q100) - qualified for under-hood automotive environments |
| Write endurance | 1 million cycles at +25°C; 200 k cycles at +125°C - ensures long-term reliability in thermal stress conditions |
| Data retention | 10 years at +55°C - guarantees nonvolatile storage integrity over vehicle lifetime |
| Supply voltage | 2.9 V to 5.5 V - compatible with 3.3 V and 5 V automotive power domains without level-shifting |
| ESD rating | HBM ±4000 V - protects against assembly and field electrostatic discharge events |
Pinout & Package
Package: TSSOP8 (169 mil width), ECOPACK2-compliant, RoHS-compliant surface-mount package.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 – S (Chip Select) | Active-low device select | Edge- and level-sensitive; must go high before falling edge to initiate first command after power-up |
| 2 – VSS | Ground reference | Common return path for all signals and VCC; required for stable logic thresholds and noise immunity |
| 3 – C (Serial Clock) | Clock synchronization input | Latches input data on rising edge; shifts output data on falling edge; supports CPOL=0/CPHA=0 and CPOL=1/CPHA=1 |
| 4 – D (Serial Data Input) | Command/address/data input | Receives instruction opcodes (e.g., 02h WRITE), 24-bit addresses, and payload bytes MSB-first |
| 5 – Q (Serial Data Output) | Read data output | Drives MSB-first data during READ/RDSR/RDID; enters high-impedance when S is high or HOLD is active |
| 6 – W (Write Protect) | Status register lock control | Freezes BP1/BP0 block protection size when SRWD=1 and W=low; tied high disables SRWD-based lock |
| 7 – HOLD | Communication pause signal | Halts ongoing SPI transfer without deselecting device; requires S low and C low to activate/deactivate |
| 8 – VCC | Power supply | 2.9–5.5 V supply; powers internal logic, EEPROM array, and ECC circuitry; must remain stable during all operations |
Key Features
| Feature | Design Value |
|---|---|
| Dedicated identification page | 512-byte page pre-programmed with ST device ID (20h/00h/13h); writable for app parameters and lockable to read-only via LID instruction |
| Hardware/software write protection | BP1/BP0 bits define quarter/half/full memory block lock; SRWD+W pin combination prevents status register modification |
| Embedded ECC logic | Corrects single-bit errors and detects double-bit errors during read operations - improves functional safety in ASIL-B/C systems |
| Fast page write | ≤4 ms typical (2.8 ms) for full 512-byte page - reduces firmware update latency in OTA-capable ECUs |
| Noise-immune interface | Schmitt trigger inputs on S, C, D, HOLD, W - suppresses EMI-induced glitches in high-noise automotive harness environments |
Applications
| Engine Control Unit (ECU) | Advanced Driver Assistance Systems (ADAS) |
|---|---|
|
Use Scenario: Storing calibration maps, fault logs, and adaptive learning parameters subject to frequent updates across vehicle lifetime. IC Role / Device Role / Timing Role: Nonvolatile configuration storage with deterministic write timing and ECC-protected reads for ASIL-B functional safety compliance. Use Value: Enables safe, repeatable reprogramming of torque maps and misfire counters without risk of bit corruption during engine cranking transients. |
Use Scenario: Retaining camera lens calibration offsets, radar fusion coefficients, and sensor alignment data across ignition cycles. IC Role / Device Role / Timing Role: High-reliability parameter vault supporting AEC-Q100 Grade 0 thermal cycling and 10-year data retention. Use Value: Maintains ADAS perception accuracy despite repeated thermal shock (−40°C to +125°C) and >1M write cycles over 15 years. |
| Battery Management System (BMS) | Electric Power Steering (EPS) |
|
Use Scenario: Logging cell voltage imbalance history, cycle count, and thermal derating thresholds in high-voltage traction battery packs. IC Role / Device Role / Timing Role: Secure, tamper-resistant storage for ISO 26262 diagnostic data with hardware write lock for critical safety parameters. Use Value: Prevents unauthorized modification of SOC/SOH algorithms while enabling OEM-level recalibration via WRID/LID sequence. |
Use Scenario: Storing steering angle zero-point offsets, motor phase mapping, and assist-torque lookup tables updated during dealer service. IC Role / Device Role / Timing Role: SPI EEPROM interfaced directly to EPS MCU for fast, low-latency parameter access during active steering control. Use Value: Achieves <4 ms page write time to minimize service downtime during firmware reflash and calibration upload. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25DF041A-SSH-T | 4-Mbit SPI flash (not EEPROM); no built-in ECC; lacks identification page and HOLD pin | Not AEC-Q100 qualified; rated only to +85°C; unsuitable for under-hood deployment | Select only for cost-sensitive non-automotive industrial use where ECC and extended temperature are not required |
| BR24G04FJ-WE2 | 4-Kbit I²C EEPROM; 1.7–5.5 V supply; no HOLD or identification page; max 100 k write cycles at +125°C | I²C interface limits speed (max 1 MHz); insufficient density for ECU map storage; lacks AEC-Q100 Grade 0 | Use only for low-bandwidth, space-constrained subsystems like HVAC control where SPI is unavailable |
Compared with AT25DF041A-SSH-T and BR24G04FJ-WE2, the M95M04-DWDW3TP/V uniquely delivers AEC-Q100 Grade 0 qualification, embedded ECC, 512-byte identification page with lock capability, and 10 MHz SPI performance - making it the only option qualified for safety-critical automotive memory tasks requiring both endurance and data integrity.
Availability
M95M04-DWDW3TP/V is available at Aetrix Electronics and suitable for engine control units, ADAS sensor modules, and battery management systems requiring stable component supply across extended automotive lifecycles.
Supply support for M95M04-DWDW3TP/V includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader specializing in automotive, industrial, and power management solutions, with deep expertise in nonvolatile memory design and AEC-Q100 qualification.
This device belongs to ST's M95M04-A automotive EEPROM product line, engineered specifically for mission-critical automotive applications demanding extended temperature operation, high write endurance, and functional safety-aware data integrity.
FAQ
What is the purpose of the identification page in the M95M04-DWDW3TP/V?
The identification page is a dedicated 512-byte memory region containing ST's device ID (20h/00h/13h) and space for application-specific parameters. It supports WRID and RDID instructions and can be permanently locked in read-only mode using the LID instruction - ensuring secure storage of calibration data or cryptographic keys without risk of overwrite.
How does the HOLD pin function during SPI communication?
The HOLD pin pauses ongoing SPI transfers without deselecting the device: when driven low while S is low and C is low, Q enters high-impedance and D/C are ignored. Communication resumes when HOLD returns high and C remains low. This allows external controllers to temporarily suspend EEPROM access without resetting the command sequence or losing internal address state.
Can the M95M04-DWDW3TP/V operate reliably at 145°C?
No - the M95M04-DWDW3TP/V is specified for −40°C to +125°C (AEC-Q100 Grade 0). The +145°C variant is the M95M04-A145, which shares architecture but uses different process and qualification testing. Using this part beyond +125°C violates its rated specification and may cause accelerated write endurance degradation or data retention failure.
What SPI modes does the M95M04-DWDW3TP/V support?
It supports two SPI modes: CPOL=0, CPHA=0 and CPOL=1, CPHA=1. In both, data is latched on the rising edge of C and shifted out on the falling edge. The difference lies in idle clock polarity: C remains low in mode 0 and high in mode 3 - allowing seamless integration with most automotive microcontrollers' SPI peripherals without additional level translation.
M95M04-DWDW3TP/V Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Mbit
- Memory Organization:
- 512K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 10 MHz
- Write Cycle Time - Word, Page:
- 4ms
- Access Time:
- 40 ns
- Voltage - Supply:
- 2.9V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
M95M04-DWDW3TP/V FAQ
1.How can I place an order for M95M04-DWDW3TP/V through Aetrix?
Please submit a Request for Quotation (RFQ) for M95M04-DWDW3TP/V on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95M04-DWDW3TP/V reliable?
The price and inventory of M95M04-DWDW3TP/V are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95M04-DWDW3TP/V is usually 5 days.
3.What payment methods are accepted for M95M04-DWDW3TP/V?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95M04-DWDW3TP/V transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95M04-DWDW3TP/V?
M95M04-DWDW3TP/V orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95M04-DWDW3TP/V order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95M04-DWDW3TP/V?
For technical support, including M95M04-DWDW3TP/V datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95M04-DWDW3TP/V requirements.
6.How does Aetrix verify that M95M04-DWDW3TP/V is sourced from the original manufacturer or authorized distributors?
All M95M04-DWDW3TP/V products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95M04-DWDW3TP/V meets industry standards.
7.What is the process for return or replacement of M95M04-DWDW3TP/V?
All M95M04-DWDW3TP/V units undergo pre-shipment inspection (PSI). If there is an issue with M95M04-DWDW3TP/V, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95M04-DWDW3TP/V part is unused and in its original packaging.
Return procedure for M95M04-DWDW3TP/V:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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