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STMicroelectronics M95M04-DWMN3TP/V
- Part No.:
- M95M04-DWMN3TP/V
- Manufacturer:
- STMicroelectronics
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
M95M04-DWMN3TP/V.pdf
- Description:
- IC EEPROM 4MBIT SPI 10MHZ 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,207
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Product details
Overview
M95M04-DWMN3TP/V from STMicroelectronics is an AEC-Q100 Grade 0 qualified 4-Mbit serial SPI EEPROM designed for automotive powertrain and chassis control units. It delivers 512-byte page writes in ≤4 ms, operates from 2.9 V to 5.5 V, supports -40°C to +125°C ambient, and features embedded ECC, software/hardware write protection, and a dedicated 512-byte identification page for device ID and locked application parameters.
For engineers reviewing the M95M04-DWMN3TP/V datasheet, M95M04-DWMN3TP/V pinout, M95M04-DWMN3TP/V application, or M95M04-DWMN3TP/V equivalent, key selection criteria include high-temperature endurance (≥200 k write cycles at +125°C), SPI mode compatibility (CPOL=0/CPHA=0 and CPOL=1/CPHA=1), Schmitt-trigger noise immunity, and hardware/software block protection granularity down to upper quarter memory.
Technical Context
This EEPROM implements a true electrically erasable programmable memory array organized as 1024 × 512-byte pages (524,288 × 8 bits), with built-in ECC logic enhancing data integrity during read operations. The identification page (address 0x000000–0x0001FF) contains factory-programmed ST device codes (0x20, 0x00, 0x13) and user-writable fields that support permanent lock-to-read-only mode via LID instruction.
It supports dual SPI modes (CPOL=0/CPHA=0 and CPOL=1/CPHA=1), with data latched on rising clock edge and output shifted on falling edge. Write enable requires explicit WREN instruction, and status register (WIP/WEL/BP1/BP0/SRWD) controls access granularity, block protection size, and write-lock persistence - all non-volatile and retained across power cycles.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory capacity | 4 Mbit (524,288 × 8 bits), organized as 1024 pages of 512 bytes each |
| Interface | SPI-compatible, supports CPOL=0/CPHA=0 and CPOL=1/CPHA=1 modes up to 10 MHz |
| Operating voltage | 2.9 V to 5.5 V - enables direct integration with 3.3 V and 5 V automotive microcontrollers |
| Temperature range | -40°C to +125°C (Grade 0 AEC-Q100) - validated for engine control modules and transmission ECUs |
| Write endurance | ≥200,000 cycles at +125°C - ensures reliability in under-hood applications over full vehicle lifetime |
| Data retention | >10 years at 55°C - exceeds automotive long-term storage requirements for calibration data |
| Page write time | Typically 2.8 ms, max 4 ms - enables fast firmware parameter updates without system timeout violations |
| ESD rating | HBM ±4000 V - provides robustness against assembly and field electrostatic discharge events |
Pinout & Package
Supplied in ECOPACK2-compliant SO8N (150 mil width) and TSSOP8 (169 mil width) packages. Pin 1 is marked by a beveled corner or dot; both packages share identical pin mapping.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| S (Chip Select) | Active-low device enable | Edge- and level-sensitive; must go high after byte boundary to complete commands; deselects Q to high-Z |
| C (Serial Clock) | Synchronization signal | Drives timing for D input sampling (rising edge) and Q output shifting (falling edge); supports two SPI polarities |
| D (Data Input) | Serial command/address/data input | Accepts MSB-first opcodes (e.g., 06h WREN), 24-bit addresses, and payload bytes; ignored during HOLD |
| Q (Data Output) | Serial data output | Shifts MSB-first status register or memory contents; enters high-Z when S is high or HOLD is active |
| W (Write Protect) | Status register protection control | When SRWD=1 and W=low, BP1/BP0 and SRWD bits are frozen - prevents accidental configuration changes |
| HOLD | Communication pause signal | Halts ongoing SPI transfer without resetting internal state; requires S low and C low to activate |
| VCC | Power supply | 2.9–5.5 V operation; decoupling capacitor required per automotive EMC standards |
| VSS | Ground reference | Common return for all signals and VCC; must be low-impedance connection in noisy automotive environments |
Key Features
| Feature | Design Value |
|---|---|
| Embedded ECC logic | Corrects single-bit errors and detects double-bit errors in real time during READ, improving functional safety compliance |
| Identification page locking | LID instruction permanently disables WRID and RDID access - secures calibration IDs and cryptographic keys against overwrite |
| Software block protection | BP1/BP0 bits in status register allow dynamic selection of unprotected region: none / upper quarter / upper half / full memory |
| Schmitt-trigger inputs | On S, C, D, HOLD, and W pins - rejects <100 ns noise spikes common in 12 V automotive harnesses |
| Enhanced latch-up immunity | Qualified to AEC-Q100 stress tests - prevents destructive current paths during load dump or jump-start transients |
Applications
| Engine Control Unit (ECU) | Advanced Driver Assistance Systems (ADAS) |
|---|---|
|
Use Scenario: Storing adaptive fuel trim tables, knock sensor learning values, and emission calibration maps subject to frequent rewrites during vehicle service. IC Role / Device Role / Timing Role: Nonvolatile parameter store interfaced directly to MCU's SPI peripheral; accessed during idle periods to avoid interrupt latency impact. Use Value: 200 k write cycles at +125°C ensures ≥15-year reliability in turbocharged engine bays without wear leveling overhead. |
Use Scenario: Retaining camera lens distortion coefficients, radar object classification thresholds, and sensor fusion weights updated during OTA calibration sessions. IC Role / Device Role / Timing Role: Secure configuration vault - identification page holds manufacturer-specific keys; LID locks them post-certification. Use Value: Hardware-enforced write protection (W pin + SRWD) prevents unauthorized modification of safety-critical ADAS parameters. |
| Electric Power Steering (EPS) | Transmission Control Module (TCM) |
|
Use Scenario: Logging torque sensor zero-offset drift compensation and motor phase alignment data across vehicle lifetime. IC Role / Device Role / Timing Role: High-integrity data logger - ECC corrects bit flips induced by EMI near 3-phase inverter switching. Use Value: Schmitt-trigger inputs reject PWM noise coupling into SPI lines, eliminating spurious command decoding in 48 V EPS systems. |
Use Scenario: Storing gear shift map variants, clutch pressure profiles, and adaptive learning for dual-clutch transmissions operating at >130°C oil temperature. IC Role / Device Role / Timing Role: Temperature-hardened memory - rated for continuous +125°C operation with guaranteed 10-year data retention. Use Value: Page write time ≤4 ms enables fast update of shift logic during dealer reprogramming without disrupting CAN bus scheduling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive-grade serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25DF041A-MAHN-T | 4 Mbit SPI NOR Flash (not EEPROM); lacks ECC, no identification page, 100 k cycle endurance at +85°C only | Requires external wear leveling; unsuitable for frequent parameter updates in hot zones | Select only if cost sensitivity outweighs endurance and ECC requirements |
| BR24G04FJ-WE2 | 4 Kbit I²C EEPROM (not SPI); 1 million cycles at +105°C; no AEC-Q100 Grade 0 qualification | Insufficient capacity for modern ECU calibration data; limited temperature margin for under-hood use | Use only in cabin modules where temperature and density demands are lower |
Compared with AT25DF041A-MAHN-T and BR24G04FJ-WE2, M95M04-DWMN3TP/V uniquely combines AEC-Q100 Grade 0 qualification, embedded ECC, 512-byte page write speed, and a dedicated lockable identification page - making it the only option qualified for safety-critical, high-temperature, high-write-frequency automotive control applications.
Availability
M95M04-DWMN3TP/V is available at Aetrix Electronics and suitable for engine control units, transmission control modules, ADAS domain controllers, and electric power steering systems requiring stable component supply across extended automotive lifecycles.
Supply support for M95M04-DWMN3TP/V includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in automotive, industrial, and power management ICs with deep expertise in AEC-Q100-qualified nonvolatile memory.
This device belongs to ST's M95M04-A automotive EEPROM product line, engineered specifically for mission-critical automotive subsystems demanding extended temperature operation, high write endurance, and hardware-enforced data security.
FAQ
What is the function of the HOLD pin, and when should it be used?
The HOLD pin pauses ongoing SPI communication without deselecting the device or resetting internal state. It must be asserted while chip select (S) is low and serial clock (C) is low. During HOLD, Q goes high-impedance and D/C are ignored. This feature allows microcontrollers to temporarily suspend EEPROM access during high-priority interrupts - such as CAN message handling or ADC sampling - then resume exactly where the transaction left off.
How does the identification page differ from standard memory pages?
The identification page (512 bytes at address 0x000000–0x0001FF) contains three factory-programmed bytes (0x20, 0x00, 0x13) identifying ST and device density, plus user-accessible space for calibration keys or firmware hashes. Unlike regular pages, it supports LID (Lock Identification) instruction - once executed, WRID and RDID become invalid, and the entire page becomes read-only for life, meeting ISO 26262 ASIL-B data integrity requirements.
Can the M95M04-DWMN3TP/V operate reliably at 5.5 V and +125°C simultaneously?
Yes. The device is fully characterized and AEC-Q100 Grade 0 qualified for simultaneous operation at VCC = 5.5 V and ambient temperature = +125°C. DC and AC parameters - including tW (write cycle time), tSU (setup times), and VIH/VIL thresholds - are guaranteed across this combined stress condition, as verified in DS11938 Rev 5 Section 9 and Table 14.
What happens if a WRITE command is sent to a block protected by BP1/BP0 bits?
The device ignores the WRITE instruction and does not initiate a write cycle. No status flag is set, and the WIP bit remains 0. The command appears as a no-op - the addressed memory retains its prior value. This behavior is deterministic and occurs regardless of whether the protection is enabled via software (BP1/BP0) or hardware (W pin + SRWD), providing fail-safe write blocking for critical configuration regions.
M95M04-DWMN3TP/V Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Mbit
- Memory Organization:
- 512K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 10 MHz
- Write Cycle Time - Word, Page:
- 4ms
- Access Time:
- 40 ns
- Voltage - Supply:
- 2.9V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
M95M04-DWMN3TP/V FAQ
1.How can I place an order for M95M04-DWMN3TP/V through Aetrix?
Please submit a Request for Quotation (RFQ) for M95M04-DWMN3TP/V on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for M95M04-DWMN3TP/V reliable?
The price and inventory of M95M04-DWMN3TP/V are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95M04-DWMN3TP/V is usually 5 days.
3.What payment methods are accepted for M95M04-DWMN3TP/V?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95M04-DWMN3TP/V transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for M95M04-DWMN3TP/V?
M95M04-DWMN3TP/V orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your M95M04-DWMN3TP/V order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for M95M04-DWMN3TP/V?
For technical support, including M95M04-DWMN3TP/V datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95M04-DWMN3TP/V requirements.
6.How does Aetrix verify that M95M04-DWMN3TP/V is sourced from the original manufacturer or authorized distributors?
All M95M04-DWMN3TP/V products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95M04-DWMN3TP/V meets industry standards.
7.What is the process for return or replacement of M95M04-DWMN3TP/V?
All M95M04-DWMN3TP/V units undergo pre-shipment inspection (PSI). If there is an issue with M95M04-DWMN3TP/V, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The M95M04-DWMN3TP/V part is unused and in its original packaging.
Return procedure for M95M04-DWMN3TP/V:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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