STMicroelectronics M95P32-IXMGT/E

Overview

M95P32-IXMGT/E from STMicroelectronics is a 32-Mbit serial SPI page EEPROM with dual/quad output capability, organized as 8192 × 512-byte pages and two dedicated 512-byte identification pages. It operates from 1.6–3.6 V over –40 °C to +105 °C, supports up to 80 MHz clock frequency, delivers quad-output read throughput of 320 Mbits/s, and features ECC-based DEC/TED error correction for high reliability in safety-critical firmware storage.

For engineers reviewing the M95P32-IXMGT/E datasheet, M95P32-IXMGT/E pinout, M95P32-IXMGT/E application, or M95P32-IXMGT/E equivalent, key selection considerations include its ultra-low deep power-down current (0.6 μA), fast page write time (2 ms typical), SFDP support, block-level write protection, and dual/quad-SPI compatibility with ISO26262 status flag reporting.

Technical Context

This device implements a page-erasable EEPROM architecture using ST's proprietary NVM technology-not flash-enabling true byte-alterability and 500 kcycle endurance across full temperature range. Its PEC (Program Erase Controller) manages self-timed erase-and-program operations, ensuring consistent 2 ms page write times and 100-year data retention even after 500 kcycles.

The SPI interface supports CPOL/CPHA = (0,0) and (1,1) modes, with dual/quad read commands repurposing W-DQ2 and HOLD-DQ3 as outputs during active transfers. Internal ECC provides double-bit correction per 16-byte sector, and volatile/safety registers enable runtime configuration of output drive strength, hold behavior, and ISO26262-compliant status reporting.

Key Specifications

Pinout & Package

Available in three ECOPACK2-compliant packages: UFDFPN8 (4 × 4 mm), SO8N (4.9 × 6 mm), and WLCSP8 (2.608 × 1.531 mm). Pin functions are identical across all variants.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Compared with AT25DF321A-SSH-T, M95P32-IXMGT/E enables true byte-level updates without sector erasure and guarantees ECC-protected reliability; versus M95P32-DRMN6TP/K, it adds extended temperature qualification critical for under-hood or outdoor metering use cases.

Availability

M95P32-IXMGT/E is available at Aetrix Electronics and suitable for automotive body control modules, industrial PLC firmware storage, medical infusion pump calibration, and smart energy meter security keys requiring stable component supply, long-term data retention, and extended temperature operation.

Supply support for M95P32-IXMGT/E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and nonvolatile memory for industrial, automotive, and consumer applications.

The M95P32 series belongs to ST's ultra-low-power serial EEPROM product line, engineered specifically for applications demanding high endurance, byte-alterability, ECC-protected reliability, and extended temperature operation in safety-critical systems.

FAQ

What is the difference between M95P32-IXMGT/E and M95P32-DRMN6TP/K?

M95P32-IXMGT/E is the extended temperature variant (–40 °C to +105 °C) in UFDFPN8 package, while M95P32-DRMN6TP/K is the industrial-grade version (–40 °C to +85 °C) in SO8N package. Both share identical memory architecture, ECC, and SPI functionality-but only the IXMGT/E variant is qualified for 105 °C ambient operation and uses the smaller 4 × 4 mm DFN package.

Does M95P32-IXMGT/E support standard SPI mode 0 (CPOL=0, CPHA=0)?

Yes, M95P32-IXMGT/E fully supports SPI mode 0 (CPOL=0, CPHA=0) and mode 3 (CPOL=1, CPHA=1). Input data is latched on the rising edge of SCK, and output data appears on the falling edge. The device does not support mode 1 or mode 2 due to internal timing constraints tied to its PEC controller.

Can the two identification pages be used for user data storage?

The first identification page contains factory-programmed data and optional UID; the second is fully user-accessible and can store sensitive parameters. Once locked via the security register, the second page becomes permanently read-only-making it suitable for cryptographic keys or calibration constants that must survive field updates.

How does deep power-down mode affect ongoing operations?

Deep power-down mode (entered via B9h command) halts all internal activity and reduces current to 0.6 μA. While active, the device ignores all commands-including write, erase, and status reads-and remains unresponsive until the release command (ABh) is issued. No ongoing operations may be in progress before entering this mode.