Analog Devices Inc./Maxim Integrated MAX1070ETC

Overview

The MAX1070ETC from Maxim Integrated is a 10-bit, true-differential, serial-output analog-to-digital converter (ADC) operating at up to 1.5 Msps with ±0.5 LSB INL, 61 dB SINAD at 525 kHz, and unipolar input range (0 to VREF). It uses a single +2.7V to +3.6V analog supply, features a separate +1.8V to VDD digital logic supply (VL), and targets high-accuracy data acquisition in motor control and industrial process monitoring.

For engineers reviewing the MAX1070ETC datasheet, MAX1070ETC pinout, MAX1070ETC application, or MAX1070ETC equivalent, this page delivers verified technical context, real-world design meaning for key specs, validated pin functions, application-specific implementation value, and two confirmed alternative ADCs for unipolar 10-bit, 1.5 Msps differential sampling systems.

Technical Context

The MAX1070ETC employs a successive-approximation register (SAR) architecture with an internal true-differential track-and-hold (T/H), enabling noise-immune sampling of differential analog signals without pipeline delay. Its conversion is initiated by a CNVST falling edge and clocked by an external SCLK up to 24 MHz, delivering 10-bit results in 16 clock cycles.

It supports three power states: normal mode (6–8 mA IDD), partial power-down (1 mA IDD), and full power-down (≤1 µA IDD), all controlled via CNVST/SCLK sequencing. The VL supply allows direct interfacing with 1.8V digital logic while VDD powers the analog core, decoupling noise-sensitive domains.

Key Specifications

Pinout & Package

The MAX1070ETC is housed in a 12-pin 3mm × 3mm TQFN package with exposed paddle (EP), rated for –40°C to +85°C operation. Pin 1 is AIN–, pin 12 is AIN+, and pins 5 and 11 are no-connect (N.C.). EP is internally connected to GND.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 10-bit, differential-input, serial-output ADC applications.

Compared with ADS8325IDRCT and AD7450ARTZ-REEL7, the MAX1070ETC uniquely combines 1.5 Msps throughput, true-differential input architecture, and dual-supply (VDD/VL) I/O flexibility-making it optimal for high-speed, noise-prone industrial and motor control systems requiring deterministic latency and mixed-voltage compatibility.

Availability

MAX1070ETC is available at Aetrix Electronics and suitable for motor control feedback, industrial process monitoring, and portable test equipment requiring stable component supply, extended temperature operation (–40°C to +85°C), and RoHS-compliant packaging.

Supply support for MAX1070ETC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, automotive, and communications markets.

The MAX1070ETC belongs to Maxim's high-speed, low-power SAR ADC product line, engineered specifically for applications demanding true-differential input performance, sub-µA shutdown, and seamless integration with low-voltage digital controllers.

FAQ

What is the maximum sampling rate supported by the MAX1070ETC?

The MAX1070ETC supports a maximum sampling rate of 1.5 Msps, achieved with an SCLK frequency of 24.0 MHz and 16 clock cycles per conversion. This rate is guaranteed for VL > 2.7 V; at lower VL (e.g., 1.8 V), the recommended maximum fSCLK drops to 22.5 MHz per timing specifications. The MAX1070ETC maintains full AC performance-including 61 dB SINAD-at this rate when driven with proper layout and bypassing.

Does the MAX1070ETC require an external reference voltage?

Yes, the MAX1070ETC requires an external reference voltage applied to the REF pin. It accepts VREF from 1.0 V to VDD + 50 mV, and optimal performance demands bypassing REF with both a 4.7 µF tantalum and a 0.01 µF ceramic capacitor to RGND. The MAX1070ETC does not include an internal reference, so accuracy and stability depend entirely on the external reference's precision and noise characteristics.

How does the MAX1070ETC handle power-down modes?

The MAX1070ETC supports two distinct power-down modes: partial (1 mA IDD) and full (≤1 µA IDD), both entered and exited using specific CNVST and SCLK timing sequences. Partial mode is activated by pulling CNVST high after the 3rd but before the 14th SCLK rising edge; full mode requires repeating that sequence. Neither mode requires reinitialization upon wake-up, and the MAX1070ETC retains calibration across transitions.

What is the function of the VL pin on the MAX1070ETC?

The VL pin on the MAX1070ETC supplies power to the digital I/O circuitry (CNVST, SCLK, DOUT), allowing independent operation from the analog supply VDD. It accepts voltages from +1.8 V to VDD, enabling direct interfacing with 1.8 V, 2.5 V, or 3.3 V logic families without level shifters. Proper bypassing with 10 µF and 0.01 µF capacitors to GND is required to maintain timing integrity and noise immunity.

Is the MAX1070ETC compatible with standard SPI interfaces?

Yes, the MAX1070ETC is fully compatible with SPI, QSPI, and MICROWIRE interfaces using only three wires: CNVST (chip select/conversion trigger), SCLK (serial clock), and DOUT (data out). It supports all four SPI modes (CPOL/CPHA combinations), and data is always MSB-first. Unlike standard SPI slaves, the MAX1070ETC initiates conversion on CNVST falling edge-not SCLK-and requires no separate chip-select line due to its dedicated CNVST control.