Analog Devices Inc./Maxim Integrated MAX1113CEE+T

Overview

The MAX1113CEE+T from Maxim Integrated is a low-power, 8-bit, 4-channel analog-to-digital converter (ADC) with integrated track/hold, 4.096V internal reference, SPI/QSPI/MICROWIRE-compatible serial interface, and software-configurable unipolar/bipolar and single-ended/differential input modes. It operates from a single 4.5V–5.5V supply, consumes only 135µA at 50ksps, and is housed in a 16-pin QSOP package for compact portable data acquisition systems.

For engineers reviewing the MAX1113CEE+T datasheet, MAX1113CEE+T pinout, MAX1113CEE+T application, or MAX1113CEE+T equivalent, this page delivers verified technical context, real-world timing behavior, channel configuration logic, power-down control semantics, and precise analog input range definitions - all grounded in the official Maxim datasheet Rev 2 (April 2011).

Technical Context

The MAX1113CEE+T uses successive-approximation (SAR) architecture with an internal track/hold circuit that acquires input signals in ≤1µs (typical), supports both internal (400kHz typ) and external clock modes (up to 2MHz for serial interface), and performs conversions in 25µs (internal clock mode) or 10 SCLK cycles (external clock mode). Its pseudo-differential sampling architecture enables 4 single-ended or 2 differential input pairs (CH0/CH1, CH2/CH3), with COM referenced zero-code alignment.

Conversion accuracy is defined by ±1 LSB total unadjusted error (max), ±0.3 LSB typical INL, and 49dB SINAD at 10.034kHz input; full-scale range is set by either the internal 4.096V reference (±0.8 ppm/°C drift) or an external 1V–VDD reference. The device features a dedicated SSTRB output for interrupt-driven readout and three-level SHDN control (high-Z, active-low shutdown, reference disable).

Key Specifications

Pinout & Package

The MAX1113CEE+T is packaged in a 16-pin QSOP (Quad Small Outline Package) with 0.154" body width and standard JEDEC MO-137AC footprint. Pin pitch is 0.025", and thermal pad is not present.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 8-bit multi-channel serial ADC applications.

Compared with the MAX1113CEE+T, the ADS7822U offers higher sample rate but demands external reference design and lacks bipolar input support, while the MCP3204-I/P provides greater resolution but removes critical real-time signaling (SSTRB) and low-power control (SHDN), increasing firmware complexity and system-level power management overhead.

Availability

The MAX1113CEE+T is available at Aetrix Electronics and suitable for portable data logging, hand-held instrumentation, and solar-powered remote monitoring requiring stable component supply, long-lifecycle availability, and guaranteed traceable sourcing.

Supply support for MAX1113CEE+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for demanding industrial, medical, and communications applications.

The MAX1113CEE+T belongs to Maxim's low-power serial ADC product line, engineered specifically for battery-operated and space-constrained data acquisition systems requiring integrated reference, flexible input configuration, and deterministic conversion signaling.

FAQ

What is the maximum sampling rate supported by the MAX1113CEE+T?

The MAX1113CEE+T supports up to 50ksps when using its internal clock or an external SCLK of 500kHz in external clock mode. In external clock mode, each conversion requires exactly 10 SCLK cycles, so the maximum rate is limited by SCLK frequency. At 500kHz, that yields 50ksps; lower SCLK frequencies proportionally reduce the rate. The internal clock operates at ~400kHz, enabling consistent 40ksps operation independent of µC clocking constraints.

How does the SHDN pin function on the MAX1113CEE+T?

The SHDN pin on the MAX1113CEE+T is a three-level input: high-impedance enables normal operation; connection to DGND reduces supply current to ≤10µA (full shutdown); connection to VDD disables only the internal 4.096V reference while keeping digital circuitry active. This allows selective power gating - for example, disabling the reference during standby while preserving register state and interface readiness - a capability not found in simpler enable/disable pins.

Can the MAX1113CEE+T perform differential measurements, and which channel pairs are supported?

Yes, the MAX1113CEE+T supports pseudo-differential measurements using two channel pairs: CH0/CH1 and CH2/CH3. In differential mode, the device samples the voltage difference (CH0 – CH1 or CH2 – CH3), with COM serving as the common-mode reference. Bipolar differential mode gives a ±2.048V input range (±VREFIN/2), while unipolar mode gives 0V–4.096V. The configuration is controlled entirely by bits SGL/DIF and channel select (SEL2–SEL0) in the 8-bit control byte.

What is the purpose of the SSTRB pin on the MAX1113CEE+T, and how does its behavior differ between clock modes?

The SSTRB pin on the MAX1113CEE+T provides hardware notification of conversion status: in internal clock mode, it goes low at conversion start and high at completion (25µs pulse); in external clock mode, it pulses high for two SCLK periods just before the MSB appears on DOUT. This allows interrupt-driven firmware to avoid polling and precisely time data reads. Unlike many ADCs, SSTRB remains functional even when CS is high in internal mode - a key advantage for low-overhead, event-triggered acquisition.

Does the MAX1113CEE+T require external components for stable operation, and if so, which ones?

Yes, the MAX1113CEE+T requires three critical external components: a 1µF tantalum or ceramic capacitor from REFOUT to AGND (mandatory for internal reference stability), a 0.1µF ceramic capacitor from VDD to AGND (placed closest to the pin), and a second 1µF bulk capacitor also from VDD to AGND. These ensure reference settling within 0.5 LSB and suppress supply noise that would degrade TUE and SINAD. No external op-amps, filters, or references are needed for basic operation - the MAX1113CEE+T is fully self-contained.