Analog Devices Inc./Maxim Integrated MAX11162EUB+
- Part No.:
- MAX11162EUB+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
MAX11162EUB+.pdf
- Description:
- IC ADC 16BIT SAR 10UMAX
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MAX11162EUB+ from Maxim Integrated is a 16-bit, 500ksps pseudo-differential SAR ADC with unipolar 0V to VREF input range, ±0.6 LSB INL (typ), 93dB SNR at 10kHz, and 23mW power consumption at full throughput - deployed in industrial process control, medical instrumentation, and test equipment signal chains.
For engineers reviewing the MAX11162EUB+ datasheet, MAX11162EUB+ pinout, MAX11162EUB+ application, or MAX11162EUB+ equivalent, this page delivers verified electrical specs, SPI-compatible interface timing, µMAX package layout guidance, and real-world daisy-chain synchronization use cases - all grounded in Maxim's official 19-6855 Rev 2 documentation.
Technical Context
The MAX11162EUB+ implements a true sampling pseudo-differential track-and-hold architecture with 0.5µs acquisition time and no pipeline latency, enabling accurate multiplexed channel sampling. Its internal T/H achieves ~6MHz small-signal bandwidth and supports simultaneous sampling across multiple devices via daisy-chain mode.
It operates from a 4.75V–5.25V analog supply (VDD) and a separate 2.3V–5.25V digital supply (OVDD), with integrated overvoltage clamps protecting AIN+ up to ±20mA fault current. The REF pin requires a low-impedance external reference (2.5V to VDD) bypassed with ≥10µF X5R/X7R ceramic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit with guaranteed no-missing-codes - ensures monotonicity and eliminates code gaps in precision measurement systems. |
| Throughput Rate | 500ksps maximum - supports high-speed data acquisition without latency, suitable for real-time control loops. |
| SNR / THD | 93dB SNR and –105dB THD at 10kHz - enables high-fidelity digitization of narrowband signals in instrumentation. |
| INL / DNL | ±0.6 LSB INL (typ), ±0.2 LSB DNL (typ) - meets 16-bit linearity requirements for calibration-critical applications. |
| Power Consumption | 23mW at 500ksps (VDD = 5V, OVDD = 3.3V) - balances performance and thermal budget in space-constrained designs. |
| Input Range | 0V to VREF unipolar pseudo-differential - simplifies sensor interfacing with remote ground sensing via AIN–. |
| Reference Input | 2.5V to VDD external reference - allows flexible scaling (e.g., 2.5V, 4.096V, or 5V) while maintaining 16-bit accuracy. |
Pinout & Package
MAX11162EUB+ is housed in a 10-pin, 3mm × 5mm µMAX® package (Pb-free, RoHS-compliant), with exposed pad for thermal enhancement. Pin 1 is marked by dot; top-view pinout follows JEDEC MS-012AC standard.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - REF | External reference voltage input | Must be bypassed with ≥10µF X5R/X7R capacitor near pin - critical for 16-bit DC accuracy and noise immunity. |
| 2 - VDD | Analog power supply (4.75V–5.25V) | Requires local 0.1µF + board-level 10µF bypassing - powers internal T/H and SAR core; affects SNR/INL stability. |
| 3 - AIN+ | Positive analog input | Accepts 0V to (VREF + AIN−); max range −0.1V to (VDD + 0.1V); includes ±20mA overvoltage clamp. |
| 4 - AIN− | Negative analog input | Used for pseudo-differential sampling; connects to remote sense ground to reject common-mode noise. |
| 5 - GND | Power-supply ground | Single ground plane required; separates analog/digital return paths only at star point - avoids ground bounce. |
| 6 - CNVST | Conversion start trigger | Rising edge initiates conversion and selects interface mode (CS vs. daisy-chain) based on SDI state. |
| 7 - SDO | Serial data output | Three-state, SPI-compatible; provides busy indicator bit when enabled - eliminates need for external timing logic. |
| 8 - SCLK | Serial clock input | Supports 14ns min period (VOVDD > 4.5V); data valid on falling edge - maximizes host readback timing margin. |
| 9 - SDI | Serial data input / mode select | Low at CNVST rising edge enables daisy-chain; high enables CS mode - configures interface without register writes. |
| 10 - OVDD | Digital I/O supply (2.3V–5.25V) | Independent of VDD; powers SDO/SDI/SCLK; requires 0.1µF + 10µF bypassing - sets VIH/VIL thresholds. |
Key Features
| Feature | Design Value |
|---|---|
| Pseudo-differential input with true T/H | 0.5µs acquisition time and 6MHz bandwidth - enables accurate sampling of multiplexed sensor channels without latency. |
| SPI/QSPI/MICROWIRE-compatible interface | Three configurable modes (3-wire CS, 4-wire CS, daisy-chain) - reduces host GPIO count and simplifies multichannel sync. |
| Integrated busy indicator on SDO | Eliminates external timer circuits - SDO asserts busy bit post-conversion, then shifts out 16-bit result on subsequent clocks. |
| Overvoltage-protected analog inputs | ±20mA clamp current on AIN+/AIN− - allows direct connection to industrial sensors without external protection diodes. |
| Low-power shutdown mode | 10µA total (VDD + OVDD) - extends battery life in portable test equipment and enables rapid wake-up (<1µs). |
Applications
| Industrial Process Control | Medical Instrumentation |
|---|---|
|
Use Scenario: High-accuracy analog monitoring of pressure, temperature, and flow transducers in PLC I/O modules. IC Role / Device Role / Timing Role: Primary 16-bit digitizer for 4–20mA loop receivers and bridge sensor front-ends; synchronized via CNVST to master controller. Use Value: ±0.6 LSB INL ensures <0.01% full-scale error across temperature - critical for NIST-traceable calibration in field instruments. |
Use Scenario: Signal acquisition in portable ECG and EEG devices requiring low-noise, low-power, and compact footprint. IC Role / Device Role / Timing Role: Front-end ADC for biopotential amplifiers; powered from single 5V rail with OVDD scaled to 2.5V for microcontroller compatibility. Use Value: 93dB SNR and 0.4 LSBRMS input-referred noise preserve QRS complex fidelity - meets AAMI EC11 clinical standards. |
| Test and Measurement | Automatic Test Equipment |
|
Use Scenario: Digitizing calibrated reference signals in benchtop multimeters and oscilloscope auxiliary channels. IC Role / Device Role / Timing Role: Precision unipolar ADC with external 4.096V reference (e.g., MAX6325); daisy-chained for multi-channel voltage logging. Use Value: 500ksps throughput and no pipeline delay enable real-time waveform capture - supports 100kHz effective Nyquist bandwidth. |
Use Scenario: Channelized stimulus-response measurement in semiconductor ATE systems with tight channel density constraints. IC Role / Device Role / Timing Role: Simultaneous-sampling node in modular digitizer card; CNVST distributed globally, SDO daisy-chained to FPGA. Use Value: Daisy-chain mode with busy indicator reduces FPGA pin count by 67% vs. parallel interface - cuts PCB layer count and cost. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX11160EUB+ | Same 16-bit/500ksps spec but uses internal reference (2.048V); no REF pin; lower pin count (8-pin µMAX). | Best for space-constrained designs where reference accuracy tolerance >0.1% is acceptable and external ref IC must be omitted. | Select MAX11160EUB+ when eliminating reference circuitry outweighs flexibility loss - not drop-in compatible due to missing REF and AIN− pins. |
| ADS8860IDRCT | Texas Instruments 16-bit/1MSPS SAR ADC; 2.5V–5V supply; SPI-only interface; no daisy-chain mode; 92.5dB SNR. | Preferred in high-throughput, single-channel applications where 1MSPS is needed and multichannel sync is handled externally. | Select ADS8860IDRCT when throughput >500ksps is mandatory and system already uses TI ecosystem - requires layout changes due to different pinout and no busy indicator. |
Compared with MAX11160EUB+, MAX11162EUB+ offers external reference flexibility and pseudo-differential input for noise rejection; compared with ADS8860IDRCT, it trades 500ksps for daisy-chain capability and integrated busy signaling - making it optimal for multichannel, noise-sensitive, medium-speed systems.
Availability
MAX11162EUB+ is available at Aetrix Electronics and suitable for industrial process control, medical instrumentation, and test and measurement applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for MAX11162EUB+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for demanding industrial, medical, and communications applications - emphasizing low noise, high accuracy, and robust operation.
The MAX11162EUB+ belongs to Maxim's high-performance SAR ADC family targeting precision data acquisition systems - engineered for minimal latency, excellent AC/DC specs, and simplified multichannel integration in harsh environments.
FAQ
What is the absolute maximum input voltage range for MAX11162EUB+?
The MAX11162EUB+ allows AIN+ to operate from –0.1V to (VDD + 0.1V), and AIN– from –0.1V to +0.1V, with overvoltage clamps activating beyond –300mV or (VDD + 300mV). Exceeding –100mV to (VDD + 100mV) degrades accuracy. The MAX11162EUB+ datasheet specifies ±20mA clamp current to protect against transient faults without external components.
Does MAX11162EUB+ support daisy-chain configuration, and how is it enabled?
Yes, MAX11162EUB+ supports daisy-chain mode: set SDI low during the rising edge of CNVST. In this mode, SDO of one device connects to SDI of the next, sharing CNVST and SCLK. The MAX11162EUB+ provides a busy indicator bit on SDO to simplify timing - confirmed in Maxim's 19-6855 Rev 2 timing diagrams and functional description.
What reference voltage options are compatible with MAX11162EUB+?
MAX11162EUB+ accepts external references from 2.5V to VDD (max 5.25V), including 2.5V (MAX6126), 4.096V (MAX6341), and 5.0V sources. The MAX11162EUB+ REF pin requires ≥10µF low-ESR X5R/X7R ceramic bypassing per Maxim's layout guidelines - Y5U/Z5U capacitors are explicitly discouraged due to poor voltage coefficient.
How does the MAX11162EUB+ achieve 16-bit no-missing-codes performance?
The MAX11162EUB+ guarantees 16-bit no-missing-codes through design validation and characterization across temperature and supply ranges - stated explicitly in its General Description and Electrical Characteristics tables. This is achieved via monotonic SAR architecture, trimmed internal DAC elements, and ±0.2 LSB DNL (typ) ensuring all 65,536 codes appear in sequence without gaps.
What is the minimum acquisition time required for full 16-bit accuracy with MAX11162EUB+?
The MAX11162EUB+ requires 0.5µs acquisition time (tACQ) to achieve full 16-bit accuracy, derived from tCYC (2µs) minus tCONV (1.5µs). Driving source impedance must be ≤2.1kΩ when connecting directly - or ≤15Ω when buffered - to meet the RSOURCE × CLOAD ≤ tACQ/12 rule per Maxim's Input Amplifier section in the MAX11162EUB+ datasheet.
MAX11162EUB+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 500k
- Number of Inputs:
- 1
- Input Type:
- Pseudo-Differential
- Data Interface:
- SPI, DSP
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 2.3V ~ 5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 10-uMAX/uSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
MAX11162EUB+ FAQ
1.How can I place an order for MAX11162EUB+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX11162EUB+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX11162EUB+ reliable?
The price and inventory of MAX11162EUB+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX11162EUB+ is usually 5 days.
3.What payment methods are accepted for MAX11162EUB+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX11162EUB+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX11162EUB+?
MAX11162EUB+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX11162EUB+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX11162EUB+?
For technical support, including MAX11162EUB+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX11162EUB+ requirements.
6.How does Aetrix verify that MAX11162EUB+ is sourced from the original manufacturer or authorized distributors?
All MAX11162EUB+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX11162EUB+ meets industry standards.
7.What is the process for return or replacement of MAX11162EUB+?
All MAX11162EUB+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX11162EUB+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX11162EUB+ part is unused and in its original packaging.
Return procedure for MAX11162EUB+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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