Analog Devices Inc./Maxim Integrated MAX11167ETC+T
- Part No.:
- MAX11167ETC+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 12-WFDFN Exposed Pad
- Datasheet:
-
MAX11167ETC+T.pdf
- Description:
- IC ADC 16BIT SAR 12TDFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,276
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MAX11167ETC+T from Maxim Integrated is a 16-bit, 250ksps successive approximation register (SAR) analog-to-digital converter with true ±5V bipolar input range, integrated 4.096V reference, and internal reference buffer. It operates from a single 5V analog supply and 2.3V–5.25V digital supply, achieving 93.2dB SNR and −102.5dB THD at 10kHz for high-fidelity data acquisition in industrial and medical instrumentation.
For engineers reviewing the MAX11167ETC+T datasheet, MAX11167ETC+T pinout, MAX11167ETC+T application, or MAX11167ETC+T equivalent, this page delivers verified specifications, SPI-compatible interface timing, TDFN-12 package layout, and validated alternative options for precision measurement systems requiring no-missing-codes performance and low-power shutdown mode.
Technical Context
The MAX11167ETC+T implements a pseudo-differential sampling architecture with patented charge-pump input stage enabling direct high-impedance source interfacing without external op-amp buffering. Its internal track-and-hold achieves full-scale settling in ≤400ns with 6MHz full-power bandwidth and <50psRMS aperture jitter.
Reference configuration is controlled via SPI-accessible register supporting four modes: internal bandgap output on REFIO with buffered REF decoupling (Mode 0), external reference into REFIO with internal buffer (Mode 1), internal bandgap only on REFIO (Mode 2), or full shutdown of both reference source and buffer (Mode 3).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit with guaranteed no-missing-codes - ensures monotonicity and eliminates code gaps in critical control loops. |
| Throughput Rate | 250ksps with zero pipeline latency - enables real-time closed-loop response without sample delay artifacts. |
| SNR / THD | 93.2dB SNR and −102.5dB THD at 10kHz - supports >15.2 ENOB for high-dynamic-range sensor digitization. |
| INL / DNL | ±0.4 LSB INL (typ), ±0.2 LSB DNL (typ) - maintains linearity across full ±5V input span for calibrated measurement accuracy. |
| Reference Accuracy | ±6.7ppm/°C TCREFIO (Mode 0/2), 4.096V ±0.1% initial - eliminates need for external precision reference in space-constrained designs. |
| Power Consumption | 21.2mW at 250ksps (VDD=5V, OVDD=3.3V, Mode 2/3); 10µA shutdown current - enables battery-powered portable instrumentation. |
| Input Voltage Range | True ±5V (10VP-P) differential input with ±0.1V AIN− common-mode range - simplifies bipolar signal conditioning without level-shifting circuitry. |
Pinout & Package
MAX11167ETC+T is housed in a 3mm × 3mm, 12-pin TDFN package with exposed pad (EP) connected to AGNDS. Pin assignments are validated per Maxim's official datasheet Rev 4 (19-6445).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 REFIO | Reference I/O | Internal bandgap output or external reference input; requires 0.1µF bypass to AGNDS for noise filtering. |
| 2 REF | Reference Buffer Output | Low-impedance buffered reference output; must be decoupled with 10µF X5R/X7R capacitor to AGNDS. |
| 3 VDD | Analog Supply | 4.75V–5.25V analog power; bypassed with 0.1µF + 10µF capacitors to minimize switching noise coupling. |
| 4 AIN+ | Positive Analog Input | Pseudo-differential input with ±7V absolute max rating and overvoltage clamp protection up to ±20mA. |
| 5 AIN− | Negative Analog Input | Common-mode reference point (−0.1V to +0.1V range); connects to remote-sense ground for accurate differential measurement. |
| 6 GND | Power Ground | Digital/analog ground return; separate from AGNDS but tied at single-point star ground on PCB. |
| 7 CNVST | Convert Start | Rising edge initiates conversion; falling edge with SCLK high enables serial interface access. |
| 8 DOUT | Serial Data Output | SPI-compatible output; data valid on SCLK falling edge; supports daisy-chaining multiple ADCs. |
| 9 SCLK | Serial Clock | Accepts 2.5V/3V/3.3V/5V logic; minimum period 14ns (VOVDD > 4.5V) for 250ksps operation. |
| 10 DIN | Serial Data Input | Configures reference mode and other settings; latched on SCLK rising edge. |
| 11 OVDD | Digital Supply | 2.3V–5.25V interface supply; independent from VDD to support mixed-voltage system interfacing. |
| 12 AGNDS | Analog Ground Sense | Zero-current reference for internal DAC and reference source; ties REFIO/REF bias points and must connect to clean analog ground plane. |
Key Features
| Feature | Design Value |
|---|---|
| Patented charge-pump input architecture | Enables direct sampling of high-impedance sources (>1MΩ) without external op-amp buffering, reducing BOM count and board area. |
| Four configurable reference modes | Supports internal bandgap-only, buffered internal, shared external, or fully external reference topologies - maximizes flexibility across multi-ADC systems. |
| Overvoltage input clamps | Protects AIN+/AIN− against ±20mA fault currents while maintaining ±(VDD + 0.1V) linear input range - improves robustness in noisy industrial environments. |
| SPI/QSPI/MICROWIRE/DSP compatibility | Interoperates with legacy and modern microcontrollers without protocol translation, enabling drop-in integration into existing firmware stacks. |
| 12-pin 3mm × 3mm TDFN package | Reduces PCB footprint by >60% vs. comparable SOIC-16 ADCs while maintaining thermal performance (qJA = 59.3°C/W). |
Applications
| Data Acquisition Systems | Industrial Control Systems |
|---|---|
Use Scenario: High-channel-count environmental monitoring using multiplexed sensor arrays (thermocouples, strain gauges, RTDs). IC Role / Device Role / Timing Role: Single-channel SAR ADC performing synchronized 250ksps sampling with zero-latency conversion for real-time waveform capture. Use Value: 16-bit no-missing-codes resolution and 93.2dB SNR enable sub-0.01% measurement accuracy across ±5V sensor outputs without post-processing calibration. |
Use Scenario: PLC analog input modules acquiring voltage/current signals from field transmitters in factory automation. IC Role / Device Role / Timing Role: Precision front-end ADC converting 4–20mA loop signals conditioned to ±5V range with integrated reference stability. Use Value: ±6.7ppm/°C internal reference TC and ±0.4 LSB INL ensure long-term accuracy drift remains below 0.02% over −40°C to +85°C operating range. |
| Medical Instrumentation | Automatic Test Equipment |
Use Scenario: Portable ECG/EEG devices digitizing low-amplitude bio-signals with high common-mode rejection. IC Role / Device Role / Timing Role: Pseudo-differential ADC rejecting power-line interference via AIN+/AIN− topology and internal CMRR optimization. Use Value: −4.6 LSB/V PSR and >90dB CMR at 50Hz/60Hz allow clean acquisition of µV-level neural signals without dedicated isolation amplifiers. |
Use Scenario: Benchtop ATE systems validating mixed-signal ICs with fast, repeatable DC/AC parameter testing. IC Role / Device Role / Timing Role: Calibration-grade ADC used in reference measurement paths for gain/offset/linearity verification. Use Value: Guaranteed 16-bit monotonicity and 0.5 LSBRMS transition noise support <0.001% test repeatability across production lots. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX11169ETC+ | Same 16-bit, ±5V architecture but 500ksps throughput; higher power (33.3mW), identical TDFN-12 package. | Required where >250ksps sampling is needed for wideband signal analysis or oversampling noise reduction. | Select MAX11169ETC+ when system timing budget allows higher power and faster conversion without changing PCB layout. |
| ADS8860IDRCT | Texas Instruments 16-bit SAR ADC; 1MSPS rate, ±4.096V input range; requires external reference; 2.5V–5V supply; WSON-10 package. | Used in high-speed data loggers where single-supply 5V operation and minimal external components are prioritized over bipolar input capability. | Choose ADS8860IDRCT only if ±5V true bipolar input is not required and external reference design is acceptable. |
Compared with MAX11167ETC+, MAX11169ETC+ offers double the throughput at cost of 57% higher active power, while ADS8860IDRCT trades bipolar input and integrated reference for raw speed and smaller footprint-making MAX11167ETC+ optimal for space-constrained, low-power, ±5V measurement systems demanding self-contained accuracy.
Availability
MAX11167ETC+T is available at Aetrix Electronics and suitable for data acquisition systems, industrial control systems, and medical instrumentation requiring stable component supply, long-term lifecycle support, and guaranteed no-missing-codes performance.
Supply support for MAX11167ETC+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for demanding industrial, medical, and communications applications.
The MAX11167ETC+T belongs to Maxim's high-accuracy SAR ADC family targeting applications where integrated reference, true bipolar input, and small-footprint packaging are essential for compact, high-reliability measurement front-ends.
FAQ
What is the maximum sample rate supported by the MAX11167ETC+T?
The MAX11167ETC+T supports a maximum throughput rate of 250ksps with zero pipeline latency. This is achieved using an internally clocked SAR architecture that completes conversion in 2.7–3.0µs after CNVST rising edge, followed by 1µs acquisition time - enabling deterministic timing for real-time control loops without FIFO buffering.
Does the MAX11167ETC+T require an external reference voltage?
No, the MAX11167ETC+T includes a factory-trimmed 4.096V internal bandgap reference with ±6.7ppm/°C temperature coefficient and internal buffer. It operates in Reference Mode 0 by default, requiring only 0.1µF on REFIO and 10µF on REF for full 16-bit accuracy - eliminating external reference components unless system-level reference sharing is needed.
What package type and pin count does the MAX11167ETC+T use?
The MAX11167ETC+T uses a 3mm × 3mm, 12-pin TDFN package with exposed pad (EP). Pinout is fixed per Maxim's datasheet Rev 4: pins include dual reference I/O (REFIO/REF), pseudo-differential analog inputs (AIN+/AIN−), SPI interface (DIN/DOUT/SCLK/CNVST), dual supplies (VDD/OVDD), and dedicated analog ground sense (AGNDS).
How does the MAX11167ETC+T handle overvoltage conditions on its analog inputs?
The MAX11167ETC+T features integrated overvoltage clamps on AIN+ and AIN− that activate above ±(VDD + 0.3V), limiting fault current to ±20mA. To maintain accuracy, input voltage must stay within ±(VDD + 0.1V); external series resistors (e.g., 1.28kΩ for 7V fault limit) are recommended to constrain clamp current during transient events.
Can multiple MAX11167ETC+T devices be daisy-chained using SPI?
Yes, the MAX11167ETC+T supports daisy-chain configuration via its SPI-compatible serial interface. When CNVST falls with SCLK high, DOUT drives the next device's DIN, allowing synchronized sampling across multiple channels with single SCLK/CNVST control - reducing GPIO count and simplifying timing in multichannel DAQ systems.
MAX11167ETC+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 12-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 250k
- Number of Inputs:
- 1
- Input Type:
- Pseudo-Differential
- Data Interface:
- SPI, DSP
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 2.3V ~ 5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 12-TDFN (3x3)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
MAX11167ETC+T FAQ
1.How can I place an order for MAX11167ETC+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX11167ETC+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX11167ETC+T reliable?
The price and inventory of MAX11167ETC+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX11167ETC+T is usually 5 days.
3.What payment methods are accepted for MAX11167ETC+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX11167ETC+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX11167ETC+T?
MAX11167ETC+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX11167ETC+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX11167ETC+T?
For technical support, including MAX11167ETC+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX11167ETC+T requirements.
6.How does Aetrix verify that MAX11167ETC+T is sourced from the original manufacturer or authorized distributors?
All MAX11167ETC+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX11167ETC+T meets industry standards.
7.What is the process for return or replacement of MAX11167ETC+T?
All MAX11167ETC+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX11167ETC+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX11167ETC+T part is unused and in its original packaging.
Return procedure for MAX11167ETC+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX11167ETC+T Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

