Analog Devices Inc./Maxim Integrated MAX11335ATJ+T

Overview

The MAX11335ATJ+T from Analog Devices is a 12-bit, 4-channel, 500ksps successive approximation register (SAR) analog-to-digital converter with external reference support, ±1 LSB INL/DNL, 70dB SINAD at 100kHz, and integrated multiplexer output access for external signal conditioning - deployed in high-speed portable data acquisition and closed-loop industrial control systems.

For engineers reviewing the MAX11335ATJ+T datasheet, MAX11335ATJ+T pinout, MAX11335ATJ+T application, or MAX11335ATJ+T equivalent, this page delivers verified technical context, real-world design meaning of key specs, validated pin functions, confirmed alternative parts with documented differences, and supply-ready availability details - all grounded in the official MAX11335–MAX11340 datasheet (Rev 2, June 2021).

Technical Context

The MAX11335ATJ+T implements a true differential track-and-hold after an internal 4-channel analog multiplexer, enabling configurable single-ended, fully differential, or pseudo-differential inputs with two software-selectable bipolar ranges (±VREF+/2 or ±VREF+). Its SampleSet™ technology supports user-defined 256-entry channel sequencing in external clock mode, reducing microcontroller overhead.

In internal clock mode, it integrates a 16-entry FIFO and on-chip averaging to improve SNR for noisy signals, while maintaining zero pipeline delay and full-linear bandwidth up to 0.5MHz (SINAD ≥ 70dB). The device uses a 3-wire SPI/QSPI/MICROWIRE-compatible interface operating up to 8MHz with CPOL = CPHA = 1.

Key Specifications

Pinout & Package

MAX11335ATJ+T is housed in a 32-pin, 5mm × 5mm TQFN package with exposed pad (EP), rated for −40°C to +125°C operation. Pin functions are validated per Analog Devices datasheet Figure 11 (MAX11335 pin configuration) and Pin Description table (page 12).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed SAR ADC applications.

Compared with ADS8684IPWR and AD7960BCPZ-RL7, the MAX11335ATJ+T uniquely combines 12-bit precision, 4-channel integration, post-mux signal access, and SampleSet™ sequencing in a 32-pin TQFN - making it optimal for compact, low-power, multichannel industrial and medical edge nodes where flexibility and layout simplicity are prioritized over raw resolution or speed.

Availability

MAX11335ATJ+T is available at Aetrix Electronics and suitable for industrial process monitoring, portable medical sensors, and high-speed closed-loop control systems requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for MAX11335ATJ+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets since 1965.

The MAX11335ATJ+T belongs to the MAX11335–MAX11340 family of multichannel SAR ADCs designed specifically for space-constrained, low-power, high-accuracy data acquisition in harsh environments - emphasizing configurability, external signal conditioning access, and intelligent power management.

FAQ

What is the maximum sampling rate of the MAX11335ATJ+T, and does it include pipeline delay?

The MAX11335ATJ+T achieves a maximum conversion rate of 500ksps with zero pipeline delay, as confirmed in the datasheet's "Conversion Rate" section. This is characteristic of SAR architecture - each conversion completes before the next begins, enabling deterministic timing for real-time control loops. The MAX11335ATJ+T maintains this rate across its full operating temperature range (−40°C to +125°C) with no performance derating.

Does the MAX11335ATJ+T support differential input configurations, and how is it implemented?

Yes, the MAX11335ATJ+T supports fully differential inputs using AIN0–AIN3 as paired channels (e.g., AIN0+/AIN1−), with dedicated AOP/AON (mux outputs) and AIP/AIN (ADC inputs) pins enabling external signal conditioning. The device guarantees 70dB SINAD at 100kHz in differential mode, and its true differential track-and-hold delivers 30ps RMS aperture jitter - critical for accurate phase-sensitive measurements in the MAX11335ATJ+T.

How does the SampleSet™ technology in the MAX11335ATJ+T reduce microcontroller overhead?

SampleSet™ allows users to pre-load a 256-entry channel sequence into the MAX11335ATJ+T's internal memory, enabling autonomous scanning across mixed single-ended, differential, and pseudo-differential inputs without MCU intervention. This eliminates continuous SPI polling and reduces interface traffic by >90% in multichannel systems - freeing CPU cycles for computation rather than data acquisition housekeeping in the MAX11335ATJ+T.

What are the power supply requirements for the MAX11335ATJ+T, and how does it manage low-power operation?

The MAX11335ATJ+T operates from a 2.35V–3.6V analog supply (VDD) and a separate 1.5V–3.6V digital I/O supply (OVDD), consuming only 4.2mW at 3V/500ksps. It features AutoShutdown™ with 2μA full-shutdown current and fast wake-up, plus internal clock mode averaging to further optimize SNR-per-milliwatt - making the MAX11335ATJ+T ideal for battery-powered instrumentation where runtime and thermal dissipation are constrained.

Can the MAX11335ATJ+T be interfaced directly with standard SPI peripherals, and what configuration is required?

Yes, the MAX11335ATJ+T's 3-wire serial interface is fully compatible with standard SPI, QSPI, and MICROWIRE controllers. It requires CPOL = CPHA = 1 (SCLK idles high, data sampled on falling edge), 8MHz max SCLK frequency, and CS-driven frame synchronization. No level shifters or glue logic are needed - the MAX11335ATJ+T accepts 1.5V–3.6V OVDD, matching modern low-voltage MCUs directly.