Analog Devices Inc./Maxim Integrated MAX11900ETP+

Overview

The MAX11900ETP+ from Maxim Integrated is a 16-bit, 1Msps fully differential successive approximation register (SAR) analog-to-digital converter with internal reference buffers, unipolar differential ±V_REF input range, 95.6dB SNR, -115dB THD at 10kHz, and 0.5 LSB max INL. It operates across -40°C to +85°C and targets high-precision data acquisition in test equipment and medical instrumentation.

For engineers reviewing the MAX11900ETP+ datasheet, MAX11900ETP+ pinout, MAX11900ETP+ application, or MAX11900ETP+ equivalent, key selection factors include its SPI/QSPI/MICROWIRE-compatible serial interface, 4mm × 4mm 20-pin TQFN package, 1.8V analog/digital supplies, 3.3V reference buffer supply, and guaranteed no-missing-codes performance at full throughput.

Technical Context

The MAX11900ETP+ employs a fully differential SAR architecture with an integrated reference buffer stage that accepts external 2.5V–3.6V references or drives REFIN from REFVDD. Its internal oscillator eliminates external clock dependency for conversion timing, and the track-and-hold circuit achieves 150ns acquisition time with 1ns aperture delay and 3psRMS jitter.

Digital interface operation supports 4-wire SPI mode with configurable SCLK up to 100MHz, DOUT readout during track or SAR conversion phases, and register-based configuration including mode and chip ID registers. The device supports shutdown mode with 1μA current and scales power linearly from 6.7mW at 1Msps to 6.7μW at 1ksps.

Key Specifications

Pinout & Package

The MAX11900ETP+ is housed in a 4mm × 4mm, 20-pin TQFN package with exposed pad (EP) connected to AGND. Pin assignments are validated per Maxim's official pin description and functional diagram (Rev 1, Sept 2018).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-precision SAR ADC applications.

Compared with AD7960BCPZ and ADS8860IDRCT, the MAX11900ETP+ uniquely combines 16-bit no-missing-codes performance, integrated reference buffering, and ultra-low 6.7mW power at 1Msps-making it optimal for space-constrained, battery-aware, high-fidelity measurement systems requiring minimal external components.

Availability

The MAX11900ETP+ is available at Aetrix Electronics and suitable for test and measurement equipment, medical instrumentation, and process control systems requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.

Supply support for MAX11900ETP+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, medical, and communications applications.

The MAX11900ETP+ belongs to Maxim's high-performance SAR ADC family targeting applications demanding high resolution, low power, and minimal external components - especially where board space, power budget, and signal integrity are critical constraints.

FAQ

What is the maximum sampling rate of the MAX11900ETP+ and how is it achieved?

The MAX11900ETP+ achieves a maximum sampling rate of 1Msps using an internal oscillator-driven SAR conversion architecture with no pipeline latency. Its 150ns acquisition time, 1ns aperture delay, and 1000ns total conversion period (t13) are fully characterized across -40°C to +85°C. This rate is sustained with 6.7mW power consumption when supplied with 1.8V AVDD/DVDD, 3.3V REFVDD, and 1.5V–3.6V OVDD - all specified in the Electrical Characteristics table of the MAX11900ETP+ datasheet.

Does the MAX11900ETP+ require an external reference voltage, or does it support internal reference buffering?

The MAX11900ETP+ supports both modes: it includes internal reference buffers that accept a 2.5V–3.6V external reference applied to REFIN (pin 20), or it can operate with an external reference directly connected to REF pins (1,2) when REFIN is grounded. When enabled, the internal buffers reduce external component count and improve PSR (0.3 LSB/V vs. REFVDD). The MAX11900ETP+ datasheet specifies REFIN input current as 1nA and turn-on settling time as 20ms with 10µF CEXT, confirming true integrated buffering capability.

What digital interface protocols does the MAX11900ETP+ support, and what are the timing constraints?

The MAX11900ETP+ supports SPI, QSPI, MICROWIRE, and DSP-compatible serial interfaces using a 4-wire configuration (SCLK, DIN, DOUT, CNVST). Key timing parameters include DIN setup time t1 = 4ns, DIN hold time t2 = 1ns, DOUT hold time t4 = 2.5ns, and SCLK period t7 = 10ns (100MHz max). These values are production-tested and guaranteed over temperature, enabling reliable interfacing with ARM Cortex-M, Renesas RX, and TI MSP430 microcontrollers without additional level-shifting or timing margining.

How does the MAX11900ETP+ manage power consumption across different sampling rates?

The MAX11900ETP+ features linear power scaling: it consumes 6.7mW at 1Msps, 6.7μW at 1ksps, and 1μA in shutdown mode. This behavior stems from its adaptive biasing architecture, where analog and digital supply currents scale proportionally with throughput. For example, IAVDD drops from 2.3mA (1Msps) to 2.3μA (1ksps), and IDVDD follows similarly - enabling energy-proportional sampling in battery-powered systems without sacrificing accuracy or introducing sleep/wake artifacts.

What are the absolute maximum ratings for the MAX11900ETP+ analog input pins, and how do they affect front-end design?

The MAX11900ETP+ analog input pins (AIN+, AIN-) have an absolute maximum rating of -0.3V to the lower of (V_REF + 0.3V) and +4V, with ±130mA fault current limit. This defines a safe operating window of -0.1V to V_REF + 0.1V under normal conditions (per Electrical Characteristics Table). Front-end protection must therefore clamp transients within this range - e.g., using 10Ω series resistors (as shown in the Application Diagram) and TVS diodes referenced to AGND and V_REF/2 - to prevent latch-up or parametric shift while preserving 32pF input capacitance and 0.4 LSBRMS transition noise performance.