Analog Devices Inc./Maxim Integrated MAX1190ECM+D
- Part No.:
- MAX1190ECM+D
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 48-TQFP Exposed Pad
- Datasheet:
-
MAX1190ECM+D.pdf
- Description:
- IC ADC 10BIT PIPELINED 48TQFP
- Quantity:
- Payment:

- Shipping:

Inventory:206
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MAX1190ECM+D from Maxim Integrated is a dual 10-bit, 120Msps analog-to-digital converter operating from a single 3.3V supply (3.1V–3.6V), delivering 57dB SINAD at 60MHz input frequency with 400MHz –3dB input bandwidth and integrated 2.048V precision bandgap reference. It supports fully differential or single-ended inputs and drives two independent ADC channels for I/Q sampling in communications receivers.
For engineers reviewing the MAX1190ECM+D datasheet, MAX1190ECM+D pinout, MAX1190ECM+D application, or MAX1190ECM+D equivalent, this page provides verified technical context, channel-matching performance data, parallel CMOS output interface details, sleep/shutdown power modes, and real-world application constraints for high-speed imaging and IF sampling systems.
Technical Context
The MAX1190ECM+D employs a nine-stage fully differential pipelined architecture with five-clock-cycle latency, enabling 120Msps conversion while minimizing power. Each channel features independent track-and-hold amplifiers with 400MHz –3dB bandwidth and aperture jitter of 2psRMS.
It integrates an on-chip 2.048V bandgap reference with ±3% accuracy and 60ppm/°C temperature coefficient, configurable for internal, buffered external, or unbuffered external reference operation. Digital outputs are CMOS-compatible, three-state, and support selectable two's complement or offset binary format via the T/B pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 10-bit - defines quantization step size of ~1.95mV per LSB at full-scale ±1VP-P differential input range |
| Sampling Rate | 120Msps - supports Nyquist-limited baseband sampling up to 60MHz or undersampling of IF signals up to 400MHz |
| SINAD | 57dB at fIN = 60MHz - determines usable dynamic range of ~9.5 effective bits in wideband applications |
| Input Bandwidth | 400MHz (–3dB) - enables faithful capture of fast-rising RF/IF transients without amplitude roll-off |
| Power Dissipation | 492mW typical - balances speed and thermal load in compact instrumentation PCBs with limited airflow |
| Channel Matching | 0.08dB gain & 0.8° phase matching - ensures <–71dBc interchannel crosstalk for coherent I/Q demodulation |
| Reference Voltage | 2.048V internal - sets precise ±1.024V full-scale range; externally adjustable via REFIN for custom input scaling |
Pinout & Package
MAX1190ECM+D is housed in a 48-pin TQFP-EP (7mm × 7mm) package with exposed paddle connected to analog ground. Pin functions are validated per Maxim's official pin description table.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INA+, INA− / INB+, INB− | Differential analog inputs (Ch A / Ch B) | Accept ±1VP-P differential or single-ended signals; require matched impedance and VDD/2 common-mode bias |
| CLK | Sampling clock input | Rising-edge triggered; requires low-jitter (<2psRMS), fast edge (<2ns) signal to preserve SNR at high fIN |
| T/B | Output format select | High = two's complement; Low = straight offset binary - configures digital interface for FPGA or DSP alignment |
| SLEEP, PD | Power control inputs | SLEEP = 3mA sleep mode; PD = 1µA shutdown - enable rapid power cycling during idle intervals in battery-powered systems |
| D0A–D9A / D0B–D9B | Parallel CMOS digital outputs | Three-state, 10-bit per channel; OVDD programmable (1.7V–3.6V) for direct interfacing with 1.8V/2.5V/3.3V logic families |
| REFOUT, REFIN, REFP, REFN, COM | Reference subsystem terminals | Support internal, buffered external, or unbuffered external reference configurations - critical for system-level accuracy and noise immunity |
Key Features
| Feature | Design Value |
|---|---|
| Dual-channel pipelined ADC architecture | Nine-stage differential pipeline with 5-clock-cycle latency enables deterministic timing for synchronous multi-channel acquisition |
| Flexible reference configuration | Internal 2.048V reference or user-defined external reference via REFIN - supports both precision metrology and variable-range signal conditioning |
| Low-power operation modes | 492mW normal, 10mW sleep, 3.3µW shutdown - reduces thermal footprint and extends runtime in portable medical and test equipment |
| Matched channel performance | 0.08dB gain and 0.8° phase matching - eliminates calibration overhead in quadrature receivers and phased-array front-ends |
| Wideband analog input stage | 400MHz –3dB bandwidth with 500MHz small-signal BW - preserves signal integrity for broadband IF digitization up to L-band |
| CMOS-compatible parallel outputs | Separate OVDD supply (1.7V–3.6V) and three-state control (OE) - simplifies interface to heterogeneous logic domains without level shifters |
Applications
| Baseband I/Q Sampling | Multichannel IF Sampling |
|---|---|
Use Scenario: Direct-conversion receiver digitizing complex baseband signals at DC–60MHz after quadrature downconversion. IC Role / Device Role / Timing Role: Dual-channel ADC simultaneously captures I and Q paths with sub-degree phase coherence and matched gain. Use Value: Eliminates need for external calibration by maintaining 0.8° phase matching, preserving EVM in WLAN/WLL modems. |
Use Scenario: Wideband spectrum analyzer frontend sampling 70MHz or 140MHz IF signals from superheterodyne mixers. IC Role / Device Role / Timing Role: High-SFDR (64dBc) dual ADC digitizes adjacent channels without intermodulation distortion. Use Value: Enables >40dB adjacent-channel rejection in VSAT terminals and cable headend analyzers. |
| Ultrasound and Medical Imaging | Battery-Powered Instrumentation |
Use Scenario: Portable ultrasound probe digitizing echo return signals across multiple receive channels with time-aligned sampling. IC Role / Device Role / Timing Role: Dual ADC provides synchronized 120Msps sampling for beamforming delay compensation. Use Value: 57dB SINAD at 60MHz supports >12cm tissue penetration depth with diagnostic-grade contrast resolution. |
Use Scenario: Handheld spectrum analyzer or oscilloscope capturing transient RF events with minimal power draw. IC Role / Device Role / Timing Role: Low-power ADC operates in burst mode: active only during trigger window, then enters 1µA shutdown. Use Value: Extends battery life to >8 hours using single Li-ion cell while maintaining 120Msps real-time capture capability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX1180ECM+ | 105Msps sampling rate; identical pinout, package, and reference architecture | Lower maximum input frequency (52.5MHz Nyquist); reduced SFDR (62dBc at 60MHz) | Select when system clock budget or thermal constraints limit to ≤105Msps, retaining layout compatibility |
| ADS5271IPFP | 10-bit, 65Msps, 1.8V core supply; LVDS outputs; no integrated reference | Requires external reference and level-shifting; lower power (320mW), but higher board complexity | Choose for cost-sensitive, lower-speed applications where LVDS noise immunity outweighs parallel interface simplicity |
Compared with MAX1190ECM+D, MAX1180ECM+ trades 15Msps speed for marginally lower power and identical footprint, while ADS5271IPFP offers LVDS robustness at half the speed and added design overhead for reference and interface translation.
Availability
MAX1190ECM+D is available at Aetrix Electronics and suitable for baseband I/Q sampling, multichannel IF digitization, and portable medical imaging systems requiring stable component supply, long-term production continuity, and guaranteed extended industrial temperature operation (–40°C to +85°C).
Supply support for MAX1190ECM+D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs high-performance analog and mixed-signal ICs for demanding signal-chain applications, with emphasis on integration, power efficiency, and precision.
The MAX1190ECM+D belongs to Maxim's high-speed data converter product line, engineered specifically for communication infrastructure, medical ultrasound, and portable test equipment where dual-channel synchronization, wide input bandwidth, and low-power operation are critical.
FAQ
What is the absolute maximum clock frequency supported by the MAX1190ECM+D?
The MAX1190ECM+D supports a maximum clock frequency of 120MHz, as specified in its electrical characteristics table. Operation beyond this frequency risks timing violations, increased aperture jitter, and degraded SINAD/SFDR performance. The device achieves optimal dynamic performance at exactly 120MHz with proper clock signal integrity - including low jitter (<2psRMS) and fast edge rates (<2ns).
Does the MAX1190ECM+D require external decoupling capacitors, and if so, where?
Yes, the MAX1190ECM+D requires external decoupling: each VDD pin (pins 2, 6, 11, 14, 15) must be bypassed to GND with a 0.1µF capacitor; REFP, REFN, and COM require ≥0.1µF capacitors to GND; OVDD pins (32, 33) need 0.1µF capacitors to OGND. These are mandatory per the Absolute Maximum Ratings and Electrical Characteristics sections to ensure stable reference operation and minimize supply-induced noise coupling into analog inputs.
Can the MAX1190ECM+D operate with single-ended analog inputs?
Yes, the MAX1190ECM+D supports single-ended operation: connect the signal source to INA+ (pin 4) or INB+ (pin 9), and tie INA− (pin 5) or INB− (pin 8) to COM (pin 1). However, differential mode is strongly recommended for best noise immunity and dynamic performance - single-ended use degrades SFDR by up to 6dB and increases susceptibility to common-mode interference.
How does the internal reference of the MAX1190ECM+D behave over temperature?
The MAX1190ECM+D internal reference delivers 2.048V ±3% over –40°C to +85°C, with a temperature coefficient of 60ppm/°C. Typical drift is ±3mV across the full range, as shown in Figure toc22. This stability supports applications like portable instrumentation where calibration-free operation is required, though high-accuracy systems may prefer buffered external references for tighter tolerance.
What is the wake-up time from shutdown mode for the MAX1190ECM+D?
The MAX1190ECM+D wakes up from shutdown mode in 1.2µs after the PD pin transitions low, as specified in the Timing Characteristics table. During this interval, the internal reference and bias circuits stabilize before valid conversions resume. This rapid recovery enables burst-mode acquisition in battery-powered test equipment without sacrificing measurement throughput.
MAX1190ECM+D Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 48-TQFP Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Number of Bits:
- 10
- Sampling Rate (Per Second):
- 120M
- Number of Inputs:
- 2
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 3.1V ~ 3.6V
- Voltage - Supply, Digital:
- 3.1V ~ 3.6V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 48-TQFP-EP (7x7)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
MAX1190ECM+D FAQ
1.How can I place an order for MAX1190ECM+D through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX1190ECM+D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX1190ECM+D reliable?
The price and inventory of MAX1190ECM+D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX1190ECM+D is usually 5 days.
3.What payment methods are accepted for MAX1190ECM+D?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX1190ECM+D transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX1190ECM+D?
MAX1190ECM+D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX1190ECM+D order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX1190ECM+D?
For technical support, including MAX1190ECM+D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX1190ECM+D requirements.
6.How does Aetrix verify that MAX1190ECM+D is sourced from the original manufacturer or authorized distributors?
All MAX1190ECM+D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX1190ECM+D meets industry standards.
7.What is the process for return or replacement of MAX1190ECM+D?
All MAX1190ECM+D units undergo pre-shipment inspection (PSI). If there is an issue with MAX1190ECM+D, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX1190ECM+D part is unused and in its original packaging.
Return procedure for MAX1190ECM+D:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX1190ECM+D Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

