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Analog Devices Inc./Maxim Integrated MAX120CWG+
- Part No.:
- MAX120CWG+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
MAX120CWG+.pdf
- Description:
- IC ADC 12BIT 500KSPS 24-SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,893
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Product details
Overview
MAX120CWG+ from Maxim Integrated is a 12-bit, 500ksps BiCMOS sampling analog-to-digital converter with integrated track/hold, ±5V bipolar input range, -5V internal reference, and 1.6µs conversion time. It operates from +4.75V to +5.25V and -10.8V to -15.75V supplies and targets high-speed data acquisition systems requiring precision DC accuracy and dynamic performance.
For engineers reviewing the MAX120CWG+ datasheet, MAX120CWG+ pinout, MAX120CWG+ application, or MAX120CWG+ equivalent, key selection considerations include its 24-pin wide SO package, TTL/CMOS-compatible µP interface, 70dB min SINAD at 100kHz input, ±1 LSB INL over 0°C to +70°C, and support for five flexible operating modes including continuous-conversion and FIFO-coupled stand-alone operation.
Technical Context
The MAX120CWG+ employs successive approximation (SAR) architecture with an on-chip track/hold featuring 350ns acquisition time and 30ps aperture jitter. Its internal -5V buried-zener reference provides ±25ppm/°C drift and supports direct bypassing with 22µF || 0.1µF capacitors.
It uses asynchronous control logic with three-state 12-bit parallel outputs (D11–D0), configurable INT/BUSY signaling via MODE pin, and supports five distinct interface modes - full-control (Mode 1), stand-alone (Mode 2), slow-memory (Mode 3), ROM (Mode 4), and continuous-conversion (Mode 5) - all compatible with standard microprocessors without wait states.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit SAR with no missing codes over temperature - guarantees monotonicity in closed-loop control and precision measurement. |
| Conversion Time | 1.6µs (13 clock cycles at 8MHz) - enables 500ksps sustained throughput for real-time signal capture. |
| Analog Input Range | ±5V bipolar, overvoltage tolerant to ±15V - simplifies front-end protection design in industrial sensor interfaces. |
| Reference Output | -5.00V internal zener reference with ±25ppm/°C drift - eliminates external reference component and reduces BOM count. |
| Dynamic Performance | 70dB min SINAD at 100kHz, -77dB max THD - meets requirements for audio digitization and spectrum analysis up to 1.5MHz full-power bandwidth. |
| Power Dissipation | 210mW typical at VDD = +5V, VSS = -12V - enables dense PCB layouts without forced air cooling in embedded instrumentation. |
| Supply Voltages | +4.75V to +5.25V (VDD), -10.8V to -15.75V (VSS) - supports dual-rail operation with standard lab power supplies and isolated DC/DC converters. |
Pinout & Package
MAX120CWG+ is housed in a 24-pin wide SO (Small Outline) package, RoHS-compliant and lead-free, with 0.300-inch body width and standard JEDEC MS-013AC footprint. Thermal derating is 11.76mW/°C above +70°C; maximum continuous power dissipation at TA = +70°C is 941mW.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 MODE | Mode configuration input | Hardwired to VDD for INT output, DGND for BUSY output, or left open for BUSY - selects interrupt behavior without firmware change. |
| 2 VSS | Negative power supply | -10.8V to -15.75V analog rail - must be decoupled separately from digital ground to maintain SNR. |
| 3 VDD | Positive power supply | +4.75V to +5.25V digital/analog rail - requires 0.1µF + 10µF local bypassing per layout guidelines. |
| 4 AIN | Analog input | ±5V bipolar input with 6kΩ || 10pF equivalent impedance - accepts direct connection from op-amp drivers or passive attenuators. |
| 5 VREF | Internal reference output | -5.00V zener reference - must be bypassed to AGND with 22µF || 0.1µF to stabilize noise and load regulation. |
| 6 AGND | Analog ground | Separate ground return for analog circuitry - tied to DGND only at single-point star ground near power entry. |
| 7–11, 13–19 D11–D0 | Data outputs | Three-state, TTL/CMOS-compatible 12-bit bus - outputs twos-complement codes with 75ns access time and 65ns bus-relinquish. |
| 12 DGND | Digital ground | Dedicated return for digital I/O - isolation from AGND prevents coupling of switching noise into analog path. |
| 20 CONVST | Convert start trigger | Falling-edge sensitive - initiates conversion and places T/H into hold mode; synchronous timing yields fixed 13-cycle conversion. |
| 21 CLKIN | Master clock input | 0.1MHz–8MHz TTL-compatible clock - determines maximum throughput; jitter directly impacts aperture uncertainty. |
| 22 INT/BUSY | Status indicator | Configurable as interrupt (MODE=VDD) or busy flag (MODE=open/DGND) - enables polling or interrupt-driven data capture. |
| 23 CS | Chip select | Active-low enable for data outputs - when low with RD, enables read; with CONVST, triggers conversion on CS fall. |
| 24 RD | Read strobe | Active-low data latch - controls output enable and can initiate conversion when CS and CONVST are low. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated track/hold | 350ns acquisition time with 30ps aperture jitter - enables accurate sampling of fast transients without external components. |
| Bipolar ±5V input range | Overvoltage tolerance to ±15V - allows direct interfacing with industrial sensors and legacy signal sources without level-shifting. |
| Five programmable interface modes | Supports µP-based, FIFO-coupled, and stand-alone architectures - eliminates need for glue logic in data loggers and DSP front-ends. |
| On-chip -5V reference | ±25ppm/°C drift and 5mA sink capability - removes external reference IC and associated compensation network. |
| TTL/CMOS-compatible I/O | No level translators required for 5V µPs or FPGAs - reduces interconnect complexity and signal integrity risk. |
| Low-noise analog core | 70dB SINAD at 100kHz, 77dB SFDR - satisfies ENOB > 11.3 bits for demanding telecom and audio applications. |
Applications
| Digital Signal Processing | Audio and Telecom Processing |
|---|---|
Use Scenario: Real-time FFT-based spectral analysis of vibration signals in predictive maintenance systems. IC Role / Device Role / Timing Role: High-throughput ADC capturing 500ksps samples with precise phase coherence for coherent averaging. Use Value: 1.5MHz full-power bandwidth and 30ps aperture jitter preserve signal fidelity across multiple channels synchronized by shared CLKIN. |
Use Scenario: Digitizing analog voiceband signals in VoIP gateways and codec evaluation platforms. IC Role / Device Role / Timing Role: Bipolar-input ADC interfacing directly to SLIC or op-amp line drivers with minimal external components. Use Value: ±5V input range matches telecom line levels; 70dB SINAD ensures clean 12-bit representation of 300Hz–3.4kHz speech band. |
| Speech Recognition and Synthesis | High-Speed Data Acquisition |
Use Scenario: Embedded keyword spotting on edge microcontrollers using analog microphone preamp outputs. IC Role / Device Role / Timing Role: Low-latency ADC feeding feature extraction pipeline with deterministic 1.6µs conversion time. Use Value: Continuous-conversion mode (Mode 5) delivers uninterrupted 500ksps stream to DMA buffers, minimizing CPU overhead. |
Use Scenario: Oscilloscope front-end in portable test equipment requiring compact, self-contained analog capture. IC Role / Device Role / Timing Role: Precision ADC with integrated T/H and reference - replaces discrete T/H + reference + ADC stack. Use Value: Single-chip solution reduces board area by >40% vs. multi-component alternatives while maintaining ±1 LSB INL spec. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit, high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX122CWG+ | 2.6µs conversion time, 333ksps throughput, 5MHz max clock - lower speed but improved THD (-85dB typ) and same package/pinout. | Better suited for lower-bandwidth, higher-fidelity applications like audio analyzers where SNR > THD trade-off favors distortion reduction. | Select MAX122CWG+ when system clock is limited to ≤5MHz or THD < -77dB is mandatory; otherwise MAX120CWG+ delivers higher throughput. |
| ADS7800KP | 12-bit, 1.6µs conversion, ±10V input range, no internal reference - requires external -5V reference and separate T/H; 28-pin PLCC package. | Designed for wider input ranges and modular reference selection; lacks integrated T/H and reference, increasing design complexity. | Choose ADS7800KP only if ±10V input or custom reference voltage is required; MAX120CWG+ offers faster time-to-market with fewer external parts. |
Compared with MAX122CWG+, the MAX120CWG+ trades 167ksps lower throughput for 1.6µs deterministic conversion and broader clock flexibility (up to 8MHz); versus ADS7800KP, it reduces bill-of-materials count by integrating reference and T/H while using a smaller 24-pin SO footprint.
Availability
MAX120CWG+ is available at Aetrix Electronics and suitable for digital-signal processing, audio and telecom processing, and high-speed data acquisition requiring stable component supply across industrial, test & measurement, and embedded OEM programs.
Supply support for MAX120CWG+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, automotive, communications, and computing markets.
The MAX120CWG+ belongs to Maxim's high-speed precision ADC product line, engineered for applications demanding both DC accuracy (±1 LSB INL) and dynamic performance (70dB SINAD) in compact, integrated form factors.
FAQ
What is the maximum clock frequency supported by MAX120CWG+?
The MAX120CWG+ supports a maximum clock frequency of 8MHz in Modes 1–4, enabling its full 500ksps throughput. In continuous-conversion mode (Mode 5), the maximum clock is reduced to 6MHz to satisfy the 350ns acquisition time requirement within two clock cycles. This constraint is explicitly specified in the datasheet's Operating Modes section and verified across temperature.
Does MAX120CWG+ require external components for basic operation?
Yes, but minimally: only decoupling capacitors for VDD, VSS, and VREF are required. The MAX120CWG+ integrates its own track/hold circuit and -5V reference, eliminating external T/H amplifiers, reference ICs, and calibration resistors. A 22µF electrolytic capacitor in parallel with a 0.1µF ceramic capacitor on VREF is mandatory for stability and noise suppression.
How does the MODE pin affect MAX120CWG+ functionality?
The MODE pin configures the INT/BUSY output behavior: tied to VDD, it asserts a pulse-width-limited interrupt on conversion completion; left open or tied to DGND, it functions as a busy flag that goes low at conversion start and returns high only after data is valid. This hardware-selectable mode eliminates firmware configuration overhead and supports both polling and interrupt-driven architectures.
Can MAX120CWG+ interface directly with a FIFO buffer without a microprocessor?
Yes - in stand-alone mode (Mode 2) or continuous-conversion mode (Mode 5), the MAX120CWG+ drives data continuously onto its 12-bit bus with INT/BUSY signaling, enabling direct connection to FIFOs like IDT7200. No µP intervention is needed; conversions run autonomously, and the FIFO's half-full flag can trigger µP read cycles - a documented architecture in the Applications Information section.
What is the guaranteed integral nonlinearity (INL) specification for MAX120CWG+?
The MAX120CWG+ guarantees ±1 LSB integral nonlinearity over its full operating temperature range of 0°C to +70°C, as confirmed in the Ordering Information table and Electrical Characteristics section. This applies specifically to the C-grade (MAX120C_) variants, including MAX120CWG+, and ensures monotonic transfer function and predictable error bounds in closed-loop control systems.
MAX120CWG+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 24-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 500k
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 5V, -10.8V ~ 15.75V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 24-SOIC
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
MAX120CWG+ FAQ
1.How can I place an order for MAX120CWG+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX120CWG+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX120CWG+ reliable?
The price and inventory of MAX120CWG+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX120CWG+ is usually 5 days.
3.What payment methods are accepted for MAX120CWG+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX120CWG+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX120CWG+?
MAX120CWG+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX120CWG+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX120CWG+?
For technical support, including MAX120CWG+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX120CWG+ requirements.
6.How does Aetrix verify that MAX120CWG+ is sourced from the original manufacturer or authorized distributors?
All MAX120CWG+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX120CWG+ meets industry standards.
7.What is the process for return or replacement of MAX120CWG+?
All MAX120CWG+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX120CWG+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX120CWG+ part is unused and in its original packaging.
Return procedure for MAX120CWG+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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