Analog Devices Inc./Maxim Integrated MAX122ACAG+
- Part No.:
- MAX122ACAG+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
MAX122ACAG+.pdf
- Description:
- IC ADC 12BIT SAR 24SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,231
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Product details
Overview
MAX122ACAG+ from Maxim Integrated is a 12-bit, 333ksps BiCMOS sampling analog-to-digital converter with integrated track/hold and -5V internal reference, ±5V bipolar input range, and 2.6µs conversion time - used in high-speed data acquisition systems requiring precise DC accuracy and low distortion.
For engineers reviewing the MAX122ACAG+ datasheet, MAX122ACAG+ pinout, MAX122ACAG+ application, or MAX122ACAG+ equivalent, this page delivers verified electrical specs, mode-specific timing behavior, TTL/CMOS-compatible µP interface details, and real-world design guidance for FIFO-coupled signal processing architectures.
Technical Context
The MAX122ACAG+ employs successive approximation (SAR) architecture with an on-chip track/hold circuit featuring 350ns acquisition time and 10ns aperture delay. Its buried-zener -5V reference provides ±25ppm/°C drift and supports ±5V analog inputs overvoltage-tolerant to ±15V.
It operates in five configurable modes (full-control, stand-alone, slow-memory, ROM, continuous-conversion), controlled via MODE, CONVST, RD, and CS pins. Conversion timing is synchronized to a 0.1MHz–5MHz TTL-compatible clock, with fixed 13- or 14-cycle latency depending on control-edge alignment relative to CLKIN.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit SAR with no missing codes over 0°C to +70°C temperature range |
| Conversion Time | 2.6µs (14 clock cycles at 5MHz), enabling 333ksps sustained throughput |
| Analog Input Range | ±5V bipolar, overvoltage tolerant to ±15V - eliminates need for external clamping in many front-end designs |
| SINAD | 70dB min at 50kHz input (fS = 333kHz), supporting >10.5 effective bits in audio-band applications |
| THD | -77dB max (first five harmonics), critical for telecom and spectrum analysis fidelity |
| Reference Output | -5.00V ±2mV at +25°C, ±25ppm/°C drift - enables ratiometric measurements without external reference |
| Power Dissipation | 210mW typical at VDD = +5V, VSS = -12V - suitable for thermally constrained embedded systems |
Pinout & Package
MAX122ACAG+ is housed in a 24-pin SSOP (Shrink Small Outline Package) with 0.635mm pitch, RoHS-compliant lead-free finish, and thermal derating of 8.00mW/°C above +70°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | MODE | Hardwired logic input selecting INT/BUSY output behavior and conversion mode (VDD = INT, open/DGND = BUSY) |
| 2 | VSS | Negative supply rail (-10.8V to -15.75V); must be decoupled independently from DGND to minimize noise coupling |
| 3 | VDD | Positive supply rail (+4.75V to +5.25V); bypassed with 0.1µF ceramic + 10µF electrolytic to AGND |
| 4 | AIN | Analog input node with ±5V full-scale range and 6kΩ || 10pF input impedance - requires careful layout separation from digital traces |
| 5 | VREF | -5V reference output; requires 22µF || 0.1µF bypass to AGND; sinks up to 5mA load |
| 6 | AGND | Analog ground return; must be isolated from DGND except at single-point power-supply star connection |
| 7–11, 13–19 | D11–D0 | Three-state, TTL/CMOS-compatible 12-bit data bus (D11 MSB, D0 LSB); outputs valid within 75ns of RD/CS assertion |
| 12 | DGND | Digital ground return; kept separate from AGND to prevent digital switching noise from modulating analog conversion |
| 20 | CONVST | Falling-edge-triggered conversion start; initiates T/H hold and SAR cycle - asynchronous to CLKIN but timing-critical for deterministic latency |
| 21 | CLKIN | TTL-compatible clock input (0.1MHz–5MHz); rising edge clocks SAR decisions and defines conversion boundary |
| 22 | INT/BUSY | Configurable status output: INT (active-low pulse on completion) or BUSY (low during conversion); drives interrupt or wait-state logic |
| 23 | CS | Active-low chip select; enables data outputs when RD is low, and can initiate conversion when CONVST and RD are also low |
| 24 | RD | Active-low read strobe; enables three-state outputs when CS is low; initiates conversion if CONVST and CS are simultaneously low |
Key Features
| Feature | Design Value |
|---|---|
| Integrated track/hold with 350ns acquisition | Eliminates external sample-hold IC and associated layout complexity while maintaining <30ps aperture jitter |
| Bipolar ±5V input with ±15V overvoltage tolerance | Supports direct connection to industrial sensor outputs without external protection diodes or level-shifting circuitry |
| Five µP interface modes including FIFO-ready continuous-conversion | Enables zero-interrupt overhead data streaming into IDT7200-style FIFOs at 333ksps without CPU intervention |
| On-chip -5V buried-zener reference (±25ppm/°C) | Removes need for precision external reference IC, reducing BOM count and improving long-term drift stability |
| TTL/CMOS-compatible digital I/O with 75ns access time | Interfaces directly to 8051, ARM7, or FPGA GPIO without level translators or wait-state insertion |
Applications
| Audio Signal Digitization | Telecom Channel Monitoring |
|---|---|
|
Use Scenario: Capturing wideband audio signals (up to 150kHz) in professional recording interfaces and VoIP gateways. IC Role / Device Role / Timing Role: ADC front-end converting differential microphone or line-level inputs with 70dB SINAD and -77dB THD. Use Value: Preserves harmonic integrity and dynamic range required for ETSI compliance testing and perceptual coding. |
Use Scenario: Real-time monitoring of analog PSTN channel voltage, current, and loop conditions in central office line cards. IC Role / Device Role / Timing Role: High-reliability sampling engine acquiring ±5V line states at 333ksps with guaranteed no-missing-codes performance. Use Value: Enables accurate SLIC diagnostics and fault detection without calibration drift across -40°C to +85°C operating range. |
| Spectrum Analyzer Front-End | Industrial Data Logging |
|
Use Scenario: Digitizing IF outputs from superheterodyne receivers in portable RF analyzers covering 10kHz–10MHz bandwidth. IC Role / Device Role / Timing Role: Precision sampling node providing 77dB SFDR and 1.5MHz full-power input bandwidth. Use Value: Supports real-time FFT computation with minimal spurious content, meeting MIL-STD-461E conducted emission requirements. |
Use Scenario: Long-duration acquisition of vibration, temperature, and pressure sensor outputs in oil & gas downhole tools. IC Role / Device Role / Timing Role: Low-power (210mW), wide-temperature ADC interfacing to microcontroller via slow-memory mode with wait-state handshake. Use Value: Extends battery life in sealed telemetry modules while maintaining ±1 LSB INL over 0°C to +70°C operating envelope. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit, medium-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS7822U | 2.7V–5.25V single-supply, SPI interface, 200ksps, no internal reference | Requires external reference and level-shifting for ±5V inputs; better suited for battery-powered portable instruments | Select when system uses SPI-only interconnect and needs lower supply voltage flexibility |
| AD7892BRZ | 5V single-supply, parallel interface, 600ksps, ±10V input range, no internal reference | Needs external ±5V reference and op-amp driver for bipolar operation; higher speed but larger package (28-SOIC) | Select when throughput >333ksps is mandatory and board space allows larger footprint |
Compared with ADS7822U and AD7892BRZ, the MAX122ACAG+ uniquely integrates a stable -5V reference and ±5V input capability in a compact 24-SSOP, reducing external component count and simplifying layout for industrial signal conditioning where supply rails are fixed at ±12V/±15V.
Availability
MAX122ACAG+ is available at Aetrix Electronics and suitable for high-speed data acquisition, telecom channel monitoring, and industrial data logging requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for MAX122ACAG+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power-management ICs for industrial, medical, and communications applications.
The MAX122ACAG+ belongs to Maxim's high-speed precision ADC family targeting applications demanding integrated references, robust µP interfacing, and guaranteed monotonicity - optimized for systems where board space, power, and calibration overhead are critical constraints.
FAQ
What is the maximum clock frequency supported by MAX122ACAG+?
The MAX122ACAG+ accepts TTL-compatible clock inputs from 0.1MHz to 5MHz across all five operational modes. At 5MHz, it achieves its rated 333ksps throughput with 2.6µs conversion time. Exceeding 5MHz violates timing specifications and may cause invalid conversions or increased DNL error.
Does MAX122ACAG+ require external components for basic operation?
Yes - the MAX122ACAG+ requires decoupling capacitors: 0.1µF ceramic + 22µF electrolytic on VREF-to-AGND, plus 0.1µF ceramic + 10µF electrolytic on VDD-to-AGND and VSS-to-AGND. No external track/hold capacitor or reference IC is needed due to full integration.
How does the MODE pin configuration affect MAX122ACAG+ behavior?
When MODE = VDD, MAX122ACAG+ configures INT/BUSY as an interrupt output (active-low pulse on conversion completion). When MODE is open or tied to DGND, INT/BUSY becomes a busy flag (low during conversion). This selection determines whether the host µP uses edge-triggered interrupts or level-sensitive wait-state signaling.
Can MAX122ACAG+ interface directly with an FPGA without level shifters?
Yes - all digital inputs (CLKIN, CONVST, RD, CS) accept TTL/CMOS logic levels (VIH ≥ 2.4V, VIL ≤ 0.8V), and outputs (D11–D0, INT/BUSY) drive TTL/CMOS loads (VOH ≥ VDD–0.5V, VOL ≤ 0.4V). The MAX122ACAG+ is fully compatible with 3.3V or 5V FPGA I/O banks without translation.
What is the guaranteed integral nonlinearity (INL) specification for MAX122ACAG+?
The MAX122ACAG+ has a guaranteed INL of ±0.75 LSB over the 0°C to +70°C temperature range, as specified in the ordering information table for the 'AC' grade. This ensures monotonicity and predictable transfer function behavior in closed-loop control and measurement applications.
MAX122ACAG+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 24-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 333k
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 5V, -10.8V ~ 15.75V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 24-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
MAX122ACAG+ FAQ
1.How can I place an order for MAX122ACAG+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX122ACAG+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX122ACAG+ reliable?
The price and inventory of MAX122ACAG+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX122ACAG+ is usually 5 days.
3.What payment methods are accepted for MAX122ACAG+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX122ACAG+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX122ACAG+?
MAX122ACAG+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX122ACAG+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX122ACAG+?
For technical support, including MAX122ACAG+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX122ACAG+ requirements.
6.How does Aetrix verify that MAX122ACAG+ is sourced from the original manufacturer or authorized distributors?
All MAX122ACAG+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX122ACAG+ meets industry standards.
7.What is the process for return or replacement of MAX122ACAG+?
All MAX122ACAG+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX122ACAG+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX122ACAG+ part is unused and in its original packaging.
Return procedure for MAX122ACAG+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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