Analog Devices Inc./Maxim Integrated MAX1267BCEG+T
- Part No.:
- MAX1267BCEG+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
MAX1267BCEG+T.pdf
- Description:
- IC ADC 12BIT SAR 24QSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,916
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MAX1267BCEG+T from Maxim Integrated is a 12-bit, 265ksps successive-approximation ADC with integrated +2.5V reference, software-configurable analog input multiplexer (2-channel single-ended or 1-channel pseudo-differential), and parallel 12-bit interface. It operates from a single +2.7V to +3.6V supply, consumes only 1.9mA at full speed, and features fast 2µs wake-up from shutdown - ideal for portable patient monitoring and battery-powered data-acquisition systems.
For engineers reviewing the MAX1267BCEG+T datasheet, MAX1267BCEG+T pinout, MAX1267BCEG+T application, or MAX1267BCEG+T equivalent, this page delivers verified electrical specs, validated QSOP-24 pin functions, confirmed unipolar/bipolar and SGL/DIF configuration behavior, and real-world timing constraints for µP interfacing - all specific to the MAX1267BCEG+T variant.
Technical Context
The MAX1267BCEG+T implements a charge-redistribution SAR architecture with an internal track/hold stage offering 3MHz full-power bandwidth and 250kHz full-linear bandwidth. Its analog front-end supports software-selectable unipolar/bipolar operation and single-ended/pseudo-differential acquisition via a 2-channel (CH0/CH1) multiplexer - distinct from the 6-channel MAX1265.
Control is executed via an 8-bit configuration byte written over the parallel bus (D7–D0), defining channel selection (A2–A0), acquisition mode (ACQMOD), clock source (internal/external), and power-down state (PD1/PD0). Conversion completes in 13 clock cycles, with interrupt-driven readout via active-low INT and tri-state parallel data bus (D0–D11).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit - delivers 1 LSB = VREF/4096 quantization step; enables ±0.5 LSB INL for high-fidelity sensor digitization. |
| Sampling Rate | 265ksps - supports Nyquist-limited signal capture up to 132.5kHz; sufficient for ECG, vibration, and energy metering waveforms. |
| Analog Supply | +2.7V to +3.6V - compatible with standard 3.3V logic rails and Li-ion battery discharge profiles without regulation. |
| Reference | +2.5V internal bandgap - eliminates external reference component; specified ±0.5% initial accuracy and ±20ppm/°C drift. |
| Power Consumption | 1.9mA at 265ksps - translates to 5.4mW at 3V; reduces thermal load in sealed medical enclosures. |
| Input Configuration | 2-channel single-ended / 1-channel pseudo-differential - matches dual-sensor inputs (e.g., temperature + humidity) or differential transducer outputs. |
| Operating Temperature | 0°C to +70°C - qualified for commercial-grade industrial control and portable instrumentation environments. |
Pinout & Package
MAX1267BCEG+T is housed in a 24-pin QSOP package (5.0mm × 7.5mm body, 0.635mm pitch), optimized for compact PCB layouts in space-constrained applications like handheld test equipment and wearable monitors.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CH0, CH1 | Analog Input Channels | Single-ended inputs referenced to COM; support unipolar (0–VREF) or bipolar (–VREF/2 to +VREF/2) modes per configuration byte. |
| COM | Analog Ground Reference | Sets zero-code voltage in single-ended mode; must remain stable to ±0.5 LSB during conversion - requires low-noise local decoupling. |
| REF | Reference Buffer Output | Delivers +2.5V internal reference; requires 4.7µF bypass capacitor to GND for stability and noise rejection. |
| REFADJ | Reference Trim Input | Connect to VDD to disable internal reference when using external reference; otherwise left open or tied to VDD. |
| VDD | Analog Power Supply | +2.7V to +3.6V supply; must be decoupled with 0.1µF ceramic capacitor close to pin to suppress switching noise. |
| GND | Analog/Digital Ground | Common return for analog and digital sections; requires star grounding to minimize ground bounce on D0–D11 bus. |
| CS | Active-Low Chip Select | Enables parallel interface; when high, forces D0–D11 into high-impedance state - essential for bus sharing with other peripherals. |
| WR | Active-Low Write Strobe | Latches 8-bit configuration byte (D7–D0); rising edge initiates acquisition/conversion based on ACQMOD bit setting. |
| RD | Active-Low Read Strobe | Enables output drivers; falling edge places 12-bit result (D11–D0) onto bus - synchronized with INT assertion. |
| INT | Active-Low Interrupt Output | Signals conversion completion; goes low when data is valid and remains low until first RD cycle or new WR command. |
| D0–D11 | Tri-State Parallel Data Bus | Bi-directional I/O lines: D7–D0 accept config byte; D11–D0 output conversion result - requires proper bus timing per tDO/tDS specs. |
| CLK | Clock Input/Output Control | In external clock mode: accepts 100kHz–4.8MHz TTL/CMOS clock; in internal mode: must be tied to VDD or GND to prevent floating. |
Key Features
| Feature | Design Value |
|---|---|
| Software-configurable input topology | Runtime selection between 2-channel single-ended and 1-channel pseudo-differential acquisition - eliminates hardware rework for sensor interface changes. |
| Integrated +2.5V reference | Eliminates need for external reference IC and associated layout area; specified ±0.5% initial accuracy and ±20ppm/°C TC ensures stable scaling across temperature. |
| Two power-down modes | Reduces supply current to <2µA in full shutdown and ~900µA in standby - extends battery life in intermittent-sampling applications like environmental loggers. |
| Fast 2µs wake-up time | Enables rapid response to event-triggered sampling (e.g., motion detection), minimizing latency between trigger and first valid sample. |
| Parallel 12-bit interface | Direct connection to 16-bit µP data buses without glue logic; supports standard I/O port timing with CS/WR/RD handshaking. |
Applications
| Portable Patient Monitoring | Industrial Data Logging |
|---|---|
Use Scenario: Continuous acquisition of ECG, SpO₂, and respiration signals in handheld clinical devices powered by coin-cell or Li-ion batteries. IC Role / Device Role / Timing Role: Primary analog front-end ADC handling multi-sensor analog inputs with precise timing control via INT-driven µP reads. Use Value: 12-bit resolution and ±0.5 LSB INL ensure diagnostic-grade waveform fidelity; 1.9mA active current extends runtime beyond 24 hours on a single CR2032 cell. |
Use Scenario: Periodic voltage/current measurement in smart building energy meters with wireless reporting every 15 minutes. IC Role / Device Role / Timing Role: Low-duty-cycle ADC activated only during scheduled sampling windows, then placed in full shutdown between readings. Use Value: <2µA shutdown current minimizes quiescent drain; software-configurable unipolar/bipolar mode supports both AC line sensing and DC battery monitoring. |
| Touch Screen Controller Interface | Embedded Test Equipment |
Use Scenario: Digitizing X/Y coordinate voltages from resistive touch panels in kiosk or HMI displays operating from 3.3V rails. IC Role / Device Role / Timing Role: Dedicated ADC providing fast, deterministic conversion of panel voltage gradients with minimal µP overhead. Use Value: 265ksps rate captures touch position updates within 4µs; internal reference removes need for precision external reference, reducing BOM cost. |
Use Scenario: Signal conditioning in handheld oscilloscope modules requiring compact, self-contained analog capture capability. IC Role / Device Role / Timing Role: High-speed SAR ADC paired with µP for real-time waveform capture and FFT analysis at sub-MHz bandwidths. Use Value: 3MHz full-power bandwidth supports undersampling of RF harmonics; parallel interface enables burst-mode data transfer at >2MB/s to µP memory. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS7822U | 8-bit resolution, SPI interface, no internal reference - requires external REF and level-shifting for 3.3V µP compatibility. | Lower resolution limits use to non-critical sensor monitoring; serial interface reduces pin count but increases µP overhead. | Select when board space is extremely constrained and 8-bit accuracy suffices for ambient light or temperature trending. |
| MAX11607EEE+ | 12-bit, I²C interface, internal reference, 10ksps max rate - lacks parallel bus and pseudo-differential mode. | Designed for ultra-low-power sensor nodes; unsuitable for real-time waveform capture due to 100µs conversion time. | Prefer for battery-powered IoT endpoints where µP resources are limited and sampling is infrequent. |
Compared with ADS7822U and MAX11607EEE+, the MAX1267BCEG+T uniquely combines parallel-speed data throughput, integrated reference, and configurable pseudo-differential acquisition - making it the only option among the three capable of supporting simultaneous dual-sensor digitization with µP-friendly timing.
Availability
MAX1267BCEG+T is available at Aetrix Electronics and suitable for portable patient monitoring, industrial data logging, and embedded test equipment requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for MAX1267BCEG+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for demanding industrial, medical, and communications applications - emphasizing low power, small size, and high integration.
The MAX1267 belongs to Maxim's low-power SAR ADC product line, engineered specifically for battery-operated instrumentation and space-constrained data-acquisition systems requiring high resolution without external reference components.
FAQ
What is the maximum sampling rate supported by the MAX1267BCEG+T?
The MAX1267BCEG+T supports a maximum sampling rate of 265ksps under typical conditions (VDD = +3V, fCLK = 4.8MHz, internal clock mode). This rate is sustained with 12-bit accuracy and ±0.5 LSB INL performance. At lower clock frequencies or in external acquisition mode, the effective rate decreases proportionally - for example, at 2.4MHz clock, the rate drops to approximately 132ksps. The MAX1267BCEG+T does not support oversampling or decimation modes to increase effective resolution.
Does the MAX1267BCEG+T include an internal voltage reference?
Yes, the MAX1267BCEG+T integrates a precision +2.5V bandgap reference with ±0.5% initial accuracy and ±20ppm/°C temperature coefficient. This reference is enabled by default and delivered at the REF pin, requiring a 4.7µF bypass capacitor to GND. The REFADJ pin allows disabling the internal reference when an external reference is used - tie REFADJ to VDD to disable, or leave open for normal operation. The MAX1267BCEG+T does not support trimming or calibration of the internal reference voltage.
How many analog input channels does the MAX1267BCEG+T support?
The MAX1267BCEG+T supports two analog input channels: CH0 and CH1. In single-ended mode, these operate independently with COM as the reference node. In pseudo-differential mode, CH0 serves as IN+ and CH1 as IN−, enabling measurement of the voltage difference between them. Unlike the MAX1265, the MAX1267BCEG+T does not support CH2–CH5 - those channels are exclusive to the 28-pin MAX1265 family members and are physically absent in the 24-pin QSOP package.
What power-down modes are available on the MAX1267BCEG+T?
The MAX1267BCEG+T offers two software-selectable power-down modes controlled by PD1/PD0 bits in the configuration byte: full power-down (IDD < 2µA) and standby power-down (IDD ≈ 900µA). Full power-down disables the internal reference, oscillator, and analog circuitry - wake-up time is 2µs. Standby mode retains reference and bias currents, enabling faster resumption (sub-microsecond) but higher current draw. Both modes are entered between conversions and exited automatically upon WR assertion.
Is the MAX1267BCEG+T pin-compatible with other devices in the MAX126x family?
No, the MAX1267BCEG+T is not pin-compatible with the MAX1265 series - it uses a 24-pin QSOP package versus the MAX1265's 28-pin QSOP. While both share functional similarity (SAR ADC, parallel interface, internal reference), pin assignments differ significantly: CH2–CH5, D10, D11, and several control pins are absent or relocated. Direct replacement requires PCB redesign. However, the MAX1267BCEG+T is functionally and footprint-compatible with the MAX1267ACEG and MAX1267AEEG variants, differing only in temperature grade and INL specification.
MAX1267BCEG+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 24-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 265k
- Number of Inputs:
- 1, 2
- Input Type:
- Pseudo-Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- MUX-S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 2.7V ~ 3.6V
- Voltage - Supply, Digital:
- 2.7V ~ 3.6V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 24-QSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
MAX1267BCEG+T FAQ
1.How can I place an order for MAX1267BCEG+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX1267BCEG+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX1267BCEG+T reliable?
The price and inventory of MAX1267BCEG+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX1267BCEG+T is usually 5 days.
3.What payment methods are accepted for MAX1267BCEG+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX1267BCEG+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX1267BCEG+T?
MAX1267BCEG+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX1267BCEG+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX1267BCEG+T?
For technical support, including MAX1267BCEG+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX1267BCEG+T requirements.
6.How does Aetrix verify that MAX1267BCEG+T is sourced from the original manufacturer or authorized distributors?
All MAX1267BCEG+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX1267BCEG+T meets industry standards.
7.What is the process for return or replacement of MAX1267BCEG+T?
All MAX1267BCEG+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX1267BCEG+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX1267BCEG+T part is unused and in its original packaging.
Return procedure for MAX1267BCEG+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX1267BCEG+T Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

