Analog Devices Inc./Maxim Integrated MAX1290ACEI+T
- Part No.:
- MAX1290ACEI+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
MAX1290ACEI+T.pdf
- Description:
- IC ADC 12BIT SAR 28QSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,500
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MAX1290ACEI+T from Maxim Integrated is a 12-bit successive-approximation analog-to-digital converter (ADC) with integrated +2.5V reference, byte-wide parallel (8+4) interface, and software-configurable 8-channel single-ended or 4-channel pseudo-differential input multiplexer. It operates from a single +5V analog supply and supports digital logic levels from +2.7V to +5.5V via VLOGIC, enabling direct interfacing with mixed-voltage microprocessors in portable data-acquisition systems.
For engineers reviewing the MAX1290ACEI+T datasheet, MAX1290ACEI+T pinout, MAX1290ACEI+T application, or MAX1290ACEI+T equivalent, this device delivers 400ksps sampling at 2.5mA supply current, ±0.5 LSB INL, 6MHz full-power bandwidth, and 2µs wake-up from shutdown - critical for battery-powered industrial sensors and medical patient monitors requiring precision, low power, and rapid response.
Technical Context
The MAX1290ACEI+T implements a capacitive charge-redistribution SAR architecture with an internal track-and-hold stage, supporting both internal and external clock modes (7.6MHz max) and internal/external acquisition control. Its analog front-end allows unipolar/bipolar and single-ended/pseudo-differential configurations via a software-defined control byte.
Conversion timing is deterministic: 13 clock cycles per conversion, with aperture delay of 25ns and acquisition time of 3.2µs (typ). The device tri-states INT on CS high and uses HBEN to multiplex 12-bit output across an 8-bit data bus - enabling compact µP interface without external latches.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit - delivers 1 part in 4096 quantization granularity for high-fidelity signal digitization. |
| Max Sampling Rate | 400ksps - supports real-time capture of signals up to ~175kHz (Nyquist-limited) or higher via undersampling. |
| INL / DNL | ±0.5 LSB / ±1 LSB - ensures monotonicity and <0.012% integral linearity error over temperature. |
| Reference | +2.5V internal bandgap - eliminates need for external reference; stable ±2ppm/°C and ±100mV adjust range via REFADJ. |
| Power Consumption | 2.5mA at 400ksps, 2µA in shutdown - enables >100-hour operation on coin-cell batteries in intermittent-scan applications. |
| Analog Input Channels | 8 single-ended or 4 pseudo-differential - provides flexible sensor multiplexing for multi-point monitoring without external MUX. |
| Full-Power Bandwidth | 6MHz - preserves amplitude accuracy for fast transients (e.g., motor current spikes, ECG slew rates). |
Pinout & Package
MAX1290ACEI+T is housed in a 28-pin QSOP (0.154" wide) package with exposed pad not electrically connected. Pin functions are validated per Maxim's official pin description table and functional diagram (Rev 3, Dec 2002).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 HBEN | High-byte enable control | Selects MSB (D8–D11) or LSB (D0–D7) output on shared 8-bit bus - reduces I/O count for 12-bit data transfer. |
| 10 INT | Open-drain interrupt output | Active-low flag signaling conversion completion and data readiness; tri-stated when CS = high. |
| 11 RD / 12 WR | Active-low read/write strobes | Enable parallel data access synchronized to CS; support µP-compatible handshaking without wait states. |
| 13 CLK | External/internal clock input | Accepts 100kHz–7.6MHz TTL/CMOS clock; tied to VDD/GND in internal clock mode. |
| 14 CS | Chip select | Enables digital outputs (INT, D0–D7) only when low; places outputs in high-impedance state otherwise. |
| 15–22 CH0–CH7 | Analog input channels | Eight single-ended inputs referenced to COM; configurable as four pseudo-differential pairs (CH0/CH1, etc.). |
| 23 COM | Analog common reference | Sets zero-code voltage in single-ended mode; must remain stable to ±0.5 LSB during conversion. |
| 25 REFADJ / 26 REF | Reference buffer I/O | REFADJ disables internal reference when tied to VDD; REF outputs +2.5V or accepts external reference. |
| 27 VDD / 28 VLOGIC | Separate analog/digital supplies | VDD = +5V ±10% analog rail; VLOGIC = +2.7V to +5.5V digital rail - isolates noise-sensitive analog section. |
Key Features
| Feature | Design Value |
|---|---|
| Software-configurable input topology | Single-ended (8 ch) or pseudo-differential (4 ch) mode selected via control byte - eliminates hardware rework for sensor interface changes. |
| Auto power-down with 2µs wake-up | Reduces average current to <10µA between conversions at low sample rates - extends battery life without sacrificing responsiveness. |
| Byte-wide parallel (8+4) interface | Delivers full 12-bit result using only 8 data lines and HBEN - saves PCB space and µP port pins vs. serial alternatives. |
| Internal +2.5V reference with ±100mV trim | Provides stable, factory-calibrated reference; REFADJ allows fine-tuning to compensate for system-level gain drift. |
| 6MHz full-power T/H bandwidth | Accurately captures fast-rising signals (e.g., pulse oximetry waveforms) without external op-amp buffering. |
Applications
| Industrial Process Monitoring | Patient Vital Sign Acquisition |
|---|---|
Use Scenario: Continuous logging of temperature, pressure, and flow sensor outputs in PLC-based control cabinets with limited thermal headroom. IC Role / Device Role / Timing Role: ADC front-end digitizing 8 analog sensor channels at 100ksps, synchronizing conversions via internal clock to minimize µP overhead. Use Value: Single-supply +5V operation and 2.5mA active current reduce heatsink requirements; ±0.5 LSB INL ensures calibration stability over 0°C to +70°C operating range. |
Use Scenario: Portable ECG and SpO₂ monitor acquiring biopotential signals with high common-mode rejection and low power budget. IC Role / Device Role / Timing Role: Pseudo-differential ADC sampling CH0/CH1 pair for lead-I ECG, rejecting 50/60Hz interference while maintaining 12-bit resolution. Use Value: Internal +2.5V reference eliminates external component count; 2µs wake-up enables on-demand sampling to extend AA battery life beyond 72 hours. |
| Energy Meter Data Logging | Touchscreen Controller Interface |
Use Scenario: Residential smart meter measuring voltage/current harmonics across multiple phases with anti-aliasing filtering. IC Role / Device Role / Timing Role: High-speed ADC capturing 400ksps samples for FFT-based harmonic analysis, using external clock for precise timing alignment. Use Value: 6MHz full-power bandwidth supports accurate digitization of 3rd–13th harmonics (150Hz–3.9kHz); 76dB SFDR prevents spectral leakage into adjacent bins. |
Use Scenario: Resistive touchscreen digitizer in handheld HMI collecting X/Y coordinate points with low latency and minimal µP intervention. IC Role / Device Role / Timing Role: 8-channel single-ended ADC scanning CH0–CH3 for X-axis and CH4–CH7 for Y-axis, triggered by touch-interrupt event. Use Value: Hardware-controlled channel sequencing via control byte reduces firmware complexity; 3.2µs acquisition time enables sub-10ms full-screen scan. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit parallel ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX1290BCNI+ | Same silicon, 28-pin DIP package; wider -40°C to +85°C temp range; ±1 LSB INL (vs. ±0.5 LSB) | Preferred for industrial environments requiring extended temperature operation and through-hole assembly. | Select MAX1290BCNI+ when board-level reliability under thermal cycling or manual soldering is prioritized over QSOP footprint. |
| ADS7822U | 12-bit, 200ksps, SPI interface, +2.7V to +5.5V supply; no internal reference; 8-pin SOIC | Suited for space-constrained designs where serial interface and smaller package outweigh parallel bus speed needs. | Choose ADS7822U when reducing pin count and PCB area is critical, and µP has SPI but limited parallel I/O resources. |
Compared with MAX1290ACEI+T, MAX1290BCNI+ trades QSOP compactness for extended temperature grade and relaxed linearity, while ADS7822U replaces parallel throughput and internal reference with serial simplicity and minimal footprint - guiding selection based on interface architecture, thermal environment, and layout constraints.
Availability
MAX1290ACEI+T is available at Aetrix Electronics and suitable for industrial process monitoring, patient vital sign acquisition, energy meter data logging, and touchscreen controller interface applications requiring stable component supply and long-term manufacturability.
Supply support for MAX1290ACEI+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for demanding industrial, medical, and communications applications, emphasizing integration, low power, and robust performance.
The MAX1290ACEI+T belongs to Maxim's high-speed, low-power ADC product line, engineered specifically for portable and space-constrained data-acquisition systems needing integrated reference, flexible input configuration, and µP-friendly parallel interface.
FAQ
What is the operating temperature range for the MAX1290ACEI+T?
The MAX1290ACEI+T is specified for commercial-grade operation from 0°C to +70°C. This range is confirmed in the Ordering Information table and Absolute Maximum Ratings section of the datasheet, and applies to all electrical specifications unless otherwise noted. The device maintains ±0.5 LSB INL and 400ksps sampling rate across this full range.
Does the MAX1290ACEI+T require an external clock to operate?
No, the MAX1290ACEI+T supports both internal and external clock modes. When configured for internal clock mode (D7=1, D6=0 in control byte), it generates its own 7.6MHz clock internally - eliminating the need for an external oscillator. The CLK pin must be tied to VDD or GND in this mode to prevent floating.
How does the HBEN pin function in the MAX1290ACEI+T parallel interface?
The HBEN (High-Byte Enable) pin controls multiplexing of the 12-bit conversion result onto the 8-bit data bus. When HBEN = 1, D0–D7 carry bits D8–D11 (MSB nibble); when HBEN = 0, D0–D7 carry bits D0–D7 (LSB nibble). This allows full 12-bit data transfer using only 8 data lines plus one control signal.
Can the MAX1290ACEI+T interface directly with a 3.3V microprocessor?
Yes, the MAX1290ACEI+T supports mixed-voltage operation via the VLOGIC pin, which accepts +2.7V to +5.5V. When VLOGIC = 3.3V, all digital outputs (D0–D7, INT, RD, WR, CS) are 3.3V-tolerant, and input thresholds (VIH/VIL) scale accordingly - enabling seamless interfacing with 3.3V µPs without level shifters.
What is the purpose of the REFADJ pin on the MAX1290ACEI+T?
The REFADJ pin serves dual roles: as the bandgap reference buffer output (when internal reference is active) and as a bandgap reference buffer input (when external reference is used). When using the internal +2.5V reference, REFADJ is bypassed to GND with 0.01µF; when using an external reference, REFADJ is tied to VDD to disable the internal bandgap.
MAX1290ACEI+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 28-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 400k
- Number of Inputs:
- 4, 8
- Input Type:
- Pseudo-Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- MUX-S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 2.7V ~ 5.5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 28-QSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
MAX1290ACEI+T FAQ
1.How can I place an order for MAX1290ACEI+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX1290ACEI+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX1290ACEI+T reliable?
The price and inventory of MAX1290ACEI+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX1290ACEI+T is usually 5 days.
3.What payment methods are accepted for MAX1290ACEI+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX1290ACEI+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX1290ACEI+T?
MAX1290ACEI+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX1290ACEI+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX1290ACEI+T?
For technical support, including MAX1290ACEI+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX1290ACEI+T requirements.
6.How does Aetrix verify that MAX1290ACEI+T is sourced from the original manufacturer or authorized distributors?
All MAX1290ACEI+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX1290ACEI+T meets industry standards.
7.What is the process for return or replacement of MAX1290ACEI+T?
All MAX1290ACEI+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX1290ACEI+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX1290ACEI+T part is unused and in its original packaging.
Return procedure for MAX1290ACEI+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX1290ACEI+T Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

