Analog Devices Inc./Maxim Integrated MAX13035EETE/V+

Overview

MAX13035EETE/V+ from Maxim Integrated is a 6-channel bidirectional logic-level translator IC designed for high-speed voltage translation between VL (1.62V–3.2V) and VCC (2.2V–3.6V) domains. It supports 100Mbps data transfer, features a dedicated CLK_RET output for clock return functionality, provides ±15kV HBM ESD protection on I/O VCC lines, and operates across –40°C to +85°C in TQFN-EP (4mm × 4mm) package - enabling SD/MiniSD/MMC memory-card interface bridging.

For engineers reviewing the MAX13035EETE/V+ datasheet, MAX13035EETE/V+ pinout, MAX13035EETE/V+ application, or MAX13035EETE/V+ equivalent, key selection criteria include guaranteed 100Mbps operation with 4mA input drivers, automatic shutdown when VCC < VL, high-impedance I/O states during shutdown, and compatibility with push-pull or open-drain signaling in multivoltage embedded systems.

Technical Context

The MAX13035EETE/V+ implements a BiCMOS-based nMOS pass-gate architecture with integrated rise/fall-time accelerator stages that activate only during signal transitions - minimizing static power while achieving sub-8ns propagation delay (tPVL-VCC = 8ns max). Its dual-supply design isolates VL-referenced I/Os (I/O VL1–VL6, CLK_VL, CLK_RET) from VCC-referenced I/Os (I/O VCC1–VCC6, CLK_VCC), with independent internal 30µA pullup current sources per channel.

Unlike MAX13030E–MAX13034E variants, MAX13035EETE/V+ omits the EN pin and relies solely on automatic shutdown triggered by VCC falling below VL (VTH_L = 0.1VL, VTH_H = 0.05VL), with I/O VL_ and I/O VCC_ both entering high-impedance state during shutdown - confirmed for this exact part number in the Ordering Information/Selector Guide.

Key Specifications

Pinout & Package

MAX13035EETE/V+ is supplied in a lead-free 16-pin TQFN-EP package (4mm × 4mm, 0.5mm pitch) with exposed paddle (EP) requiring connection to GND for thermal and ESD performance. Pin functions are electrically validated per Maxim's Functional Diagram and Pin Configurations (Rev 2, Feb 2021).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar bidirectional level translation applications.

Compared with MAX13030EETE+, MAX13035EETE/V+ removes EN complexity and adds CLK_RET - simplifying SD host designs. Versus TXS0108E, it offers tighter timing, integrated ESD, and memory-card-optimized shutdown behavior - at the cost of channel count and voltage flexibility.

Availability

MAX13035EETE/V+ is available at Aetrix Electronics and suitable for SD card interface, MMC/TransFlash integration, Memory Stick adaptation, and industrial multivoltage bridge applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for MAX13035EETE/V+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power-management ICs for demanding industrial, automotive, and communications applications.

The MAX13030E–MAX13035E product line delivers high-speed, low-power bidirectional level translation specifically for memory-card interfaces and multivoltage system interconnects - emphasizing ESD robustness, automatic power-aware operation, and minimal board footprint.

FAQ

What is the function of the CLK_RET pin on the MAX13035EETE/V+?

The CLK_RET pin on the MAX13035EETE/V+ returns an exact replica of the clock signal applied to CLK_VL, referenced to the VL supply. This eliminates the need for an external clock buffer in SD/MiniSD host-to-card interfaces, preserving signal integrity and reducing component count. The MAX13035EETE/V+ is the only variant in the family with this dedicated clock-return feature.

Does the MAX13035EETE/V+ have an enable (EN) pin?

No, the MAX13035EETE/V+ does not include an EN pin. Unlike MAX13030E–MAX13034E variants, it relies exclusively on automatic shutdown triggered when VCC falls below VL. This behavior is confirmed for the exact part number MAX13035EETE/V+ in the Ordering Information/Selector Guide, where EN is omitted from the pin configuration.

What are the I/O states during shutdown for the MAX13035EETE/V+?

During shutdown (triggered when VCC < VL), both I/O VL_ and I/O VCC_ pins enter high-impedance state for the MAX13035EETE/V+. This is explicitly documented in the Ordering Information/Selector Guide row for MAX13035EETE/V+T, confirming high-impedance behavior for both sides - ensuring safe bus isolation without external pull resistors.

What package type is used for the MAX13035EETE/V+?

The MAX13035EETE/V+ uses a 16-pin TQFN-EP package (4mm × 4mm, 0.5mm pitch) with exposed paddle. The package code T1644+4 confirms this configuration, and the exposed paddle must be connected to GND for optimal thermal dissipation (θJA = 40°C/W) and ESD performance.

Can the MAX13035EETE/V+ translate between 1.2V and 3.3V logic levels?

No, the MAX13035EETE/V+ does not support 1.2V logic translation. Its VL supply range is strictly +1.62V to +3.2V, and VCC range is +2.2V to +3.6V, with normal operation requiring VL ≤ VCC − 0.2V. For 1.2V interfaces, alternative translators such as TXB0108 or MAX3372E should be evaluated.